JPS6367669A - Control system for storage controller - Google Patents

Control system for storage controller

Info

Publication number
JPS6367669A
JPS6367669A JP61212472A JP21247286A JPS6367669A JP S6367669 A JPS6367669 A JP S6367669A JP 61212472 A JP61212472 A JP 61212472A JP 21247286 A JP21247286 A JP 21247286A JP S6367669 A JPS6367669 A JP S6367669A
Authority
JP
Japan
Prior art keywords
shared storage
computer
interface
storage device
activation request
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61212472A
Other languages
Japanese (ja)
Inventor
Tadafumi Shirakawa
白川 忠文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61212472A priority Critical patent/JPS6367669A/en
Publication of JPS6367669A publication Critical patent/JPS6367669A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To produce an access start request through a computer without waiting even in a copying mode by connecting a shared memory device with an interface exclusive for copying and inhibiting a read access to the shared memory device that is copied in a copying mode to attain other accesses. CONSTITUTION:When an access start request given from a computer 1 requires a writing action, a flag is neglected and access start request signals 22a and 22c are selected by the access start request selection means 10a and 10b of master and slave systems respectively. Then address/data control signals 21a and 21c are selected from the outputs of means 10a and 10b by interface selection means 9a and 9b and written to memory parts 12a and 12b respectively. Thus it is possible to execute an access start request given from a computer with virtually no wait even in a copying mode.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は高信頼性を要求される計算機システムの記憶
制御装置の制御方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a control system for a storage control device of a computer system that requires high reliability.

〔従来の技術〕[Conventional technology]

第3図は従来の二重化共有記憶制御装置のハードウェア
の構成を示すブロック図であり、図において1.2は計
算機、3,4は共有記憶装置、5は転写専用ハードウェ
ア、6a〜6c、7a〜7cはインタフェースである。
FIG. 3 is a block diagram showing the hardware configuration of a conventional duplex shared storage control device. In the figure, 1.2 is a computer, 3 and 4 are shared storage devices, 5 is dedicated transcription hardware, 6a to 6c, 7a to 7c are interfaces.

次に動作について説明する。従来信頬性の貰い計算機シ
ステムを実現するために共有記憶装置を二重化する方式
がよく採用されている。記憶装置を二重化するためには
二重化された共有記憶装置の記憶内容が同一である必要
があり、又アクセスする計算機は二重化した共有記憶装
置に同じ内容を書き込み、又二重化した共有記憶装置か
ら読み出して内容の一致をチェックする手段が必要であ
ると同時に、一方の系の内容を他方の系へ転写する手段
が必要である。これは故障などで一方の系だけで運転し
ている場合で、故障修理後二重化運転に戻して使用する
場合や、システム立上げ時などで一方の系の内容を他方
の系へ転写してその内容を一致させておく必要があるか
らである。この二重化共有記憶装置間における記憶内容
の転写する手段には次のような方式がある。
Next, the operation will be explained. Conventionally, in order to realize reliable computer systems, a method of duplicating shared storage devices has often been adopted. In order to duplicate storage devices, the memory contents of the duplicated shared storage devices must be the same, and the accessing computer must write the same contents to the duplicated shared storage devices and read them from the duplicated shared storage devices. There is a need for a means of checking content consistency, as well as a means of transferring the content of one system to the other system. This occurs when only one system is operating due to a failure, and when the failure is repaired and the system is returned to redundant operation, or when starting up the system, the contents of one system are transferred to the other system. This is because the contents need to be consistent. There are the following methods for transferring the storage contents between the duplex shared storage devices.

二重化される共有記憶装置間で転写動作を実行する専用
のハードウェアを設けて二重化共有記憶装置間で転写を
実施する方式である。第3図において通常の計算機1,
2よりのアクセス要求はインタフェース5a、5bより
共有記憶装置3へ、インタフェース7a、7bより共有
記憶装置4へ送出され読み書きが行われる。全共存記憶
装置4が何らかの原因で運転を中止していたとすると、
次に二重化共有記憶装置として運転を開始するためには
共有記憶装置3の内容を共有記憶装置4に転写する必要
がある。転写は計算機1.2よりのアクセス要求を禁止
して、転写専用のハードウェア5からα番地の読み出し
アクセス要求をインタフェース6Cより共有記憶装置3
へ送出されて共有記憶装置3のα番地の内容が読み出さ
れインタフェース6Cより転写専用ハードウェア5へ送
出される。次に転写専用ハードウェア5はα番地への書
き込みアクセス要求をインタフェース7cより共有記憶
装置4へ送出されて共有記憶装置4のα番地へ共有記憶
装置3のα番地の内容が書き込まれる。このようにして
0番地から実装されている共有記憶装置の最大番地まで
転写動作を実施すれば、二重化された共有記憶装置間の
内容を一致させることができる。
This is a method in which dedicated hardware is provided to perform the transfer operation between the duplexed shared storage devices, and the transfer is performed between the duplexed shared storage devices. In Figure 3, a normal calculator 1,
The access request from 2 is sent to the shared storage device 3 from the interfaces 5a and 5b, and to the shared storage device 4 from the interfaces 7a and 7b, where reading and writing are performed. Assuming that all co-existing storage devices 4 have stopped operating for some reason,
Next, in order to start operation as a duplexed shared storage device, it is necessary to transfer the contents of the shared storage device 3 to the shared storage device 4. For transcription, access requests from the computer 1.2 are prohibited, and a read access request for address α from the hardware 5 dedicated to transcription is sent from the interface 6C to the shared storage device 3.
The contents of address α of the shared storage device 3 are read out and sent to the transfer dedicated hardware 5 via the interface 6C. Next, the transfer dedicated hardware 5 sends a write access request to the α address to the shared storage device 4 through the interface 7c, and the contents of the α address of the shared storage device 3 are written to the α address of the shared storage device 4. By performing the transfer operation from address 0 to the maximum address of the installed shared storage devices in this manner, the contents of the duplicated shared storage devices can be matched.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の二重化共有記憶制御装置は以上のように構成され
ているので、共有記憶装置の記憶容量にもよるが、例え
ば2Mワードであれば、数百〜数千ミリ秒要するので、
この間計算機からのアクセス要求が禁止されるので、オ
ンライン処理が要求される計算機システムには使用でき
ない欠点があった。
Since the conventional duplex shared storage control device is configured as described above, depending on the storage capacity of the shared storage device, for example, if it is 2M words, it will take several hundred to several thousand milliseconds.
During this time, access requests from computers are prohibited, which has the disadvantage that it cannot be used in computer systems that require online processing.

この発明は転写中、計算機からのアクセスをできるよう
にしてオンライン処理が要求される計算機システムにも
使用可能で、高応答性と高倍転性を有する二重化共有記
憶制御装置を得ることを目的とする。
The purpose of this invention is to obtain a duplex shared storage control device which can be accessed from a computer during transcription, can be used in a computer system that requires online processing, and has high responsiveness and high multiplicity. .

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る記憶制御装置は、共有記憶装置間の情報
の転写を可能とし、転写されている共有記憶装置に対し
フラグをセットし、このフラグがセットされている共有
記憶装置に対し、読み出し。
The storage control device according to the present invention enables the transfer of information between shared storage devices, sets a flag for the shared storage device to which the information has been transferred, and performs read operations for the shared storage device to which this flag is set.

書き込みアクセスのうち、読み出しのアクセスのみを禁
止し、他のアクセスは実行可能とする。
Among write accesses, only read accesses are prohibited, and other accesses are allowed to be executed.

〔作用〕[Effect]

転写されている途上の共有記憶装置に対し、読み出しの
アクセスが禁止され、他の共有記憶装置に対しては可能
となる。また、書き込みアクセスは両共有記憶装置に対
して可能となる。
Read access is prohibited to the shared storage device in the process of being transferred, but read access is permitted to other shared storage devices. Also, write access is possible to both shared storage devices.

〔発明の実施例〕[Embodiments of the invention]

この発明の一実施例を図について説明する。第1図にお
いて1.2は計算機、3.4は共有記憶装置、6a、6
b及び?a、7bは計算機−共有記憶装置間インタフェ
ース、8は共有記憶装置間インタフェースである。第2
図は、第1図における共有記憶装置3,4の具体的実施
例で、図において9a、9bはインタフェース選択手段
、10a、10bはアクセス起動要求選択手段、112
.11bは転写動作制御手段、12a。
An embodiment of the present invention will be described with reference to the drawings. In Figure 1, 1.2 is a computer, 3.4 is a shared storage device, 6a, 6
b and? a and 7b are computer-shared storage device interfaces, and 8 is a shared storage device interface. Second
The figure shows a specific example of the shared storage devices 3 and 4 in FIG. 1, in which 9a and 9b are interface selection means, 10a and 10b are access activation request selection means, and
.. 11b is a transfer operation control means; 12a;

12bは記憶部、21a〜21bは計算機−共有記憶装
置間インタフェース信号、22a〜22dは計算機より
のアクセス起動要求信号、23a。
12b is a storage unit, 21a to 21b are computer-shared storage device interface signals, 22a to 22d are access activation request signals from the computer, and 23a.

23bは他系共有記憶装置よりのアクセス起動要求信号
、24a、24bは共有記憶装置間インタフェース信号
、25a、25bは転写動作制御手段より記憶部への読
み出し専用の内部インタフェースである。
Reference numeral 23b represents an access activation request signal from a shared storage device of another system, 24a and 24b are inter-shared storage device interface signals, and 25a and 25b are internal interfaces exclusively for reading from the transfer operation control means to the storage unit.

つぎに、転写動作が共有記憶装置3から共有記憶装置4
へ向かって実行される場合について説明する。この場合
前者を主系、後者を従系の共存記憶装置とすると、主系
の転写動作制御手段11aから、従系に共有記憶装置間
インクフェース8を通して、転写動作を開始する旨の信
号が送られる。
Next, the transfer operation is performed from the shared storage device 3 to the shared storage device 4.
We will explain the case where it is executed towards. In this case, if the former is the main system and the latter is the slave coexisting storage device, the transfer operation control means 11a of the main system sends a signal to the slave system to start the transfer operation through the inter-shared storage device ink interface 8. It will be done.

従系の転写動作制御手段11bはこの信号を受けとると
転写動作中である旨を示すレジスタ(図示していない)
をセットする。すなわち、フラグをセットする。このレ
ジスタがセットされていると計算機からのアクセス要求
の内、読み出し要求は無視される。今転写動作がα番地
について行われているとすると、主系の転写動作制御手
段11aは転写動作の前半は主系のα番地の内容を読み
出して、アドレス、データ、制御信号を共有記憶装置間
インタフェース8を通じて従系の共有記憶装置4に送る
。従系の共有記憶装置4では主系からのアクセス起動要
求信号23aをアクセス起動要求選択手段10bにより
選択し、アクセス起動要求選択手段10bの出力により
インタフェース選択手段9bにより主系からのアドレス
、データ。
When the slave transfer operation control means 11b receives this signal, it sets a register (not shown) indicating that the transfer operation is in progress.
Set. That is, a flag is set. If this register is set, read requests among access requests from the computer will be ignored. Assuming that the transfer operation is now being performed at address α, the transfer operation control means 11a of the main system reads the contents of address α of the main system during the first half of the transfer operation, and transfers addresses, data, and control signals between the shared storage devices. It is sent to the subordinate shared storage device 4 through the interface 8. In the slave shared storage device 4, the access activation request signal 23a from the primary system is selected by the access activation request selection means 10b, and the address and data from the primary system are selected by the interface selection means 9b based on the output of the access activation request selection means 10b.

制御信号を受けとり、記憶部12bのα番地にその内容
を書き込む。この転写動作を主系のO番地から共有記憶
装置の最大番地まで実行する。転写動作を最大番地まで
実行したならば、主系の転写動作制御手段11aから従
系の転写動作制御手段11bに転写動作終了信号を送る
。従系の転写動作制御手段11bはこの終了信号を受と
ると転写動作中である旨を示すレジスタ(図示していな
い)をリセットする。次に、転写動作中における計算機
からのアクセス起動要求信号が送出された場合について
説明する。合計算機1からアクセス起動要求信号が送出
されたとすると、このアクセス起動要求が読み出し要求
であった場合には、従系の共有記憶装置4は転写動作中
である旨のフラグがセットされているので従系からは読
み出し動作は実行されず、主系のみから読み出し動作が
実行される。動作は主系のアクセス起動要求選択手段1
0aより計算機」よりのアクセス起動要求信号22aを
選択し、アクセス起動要求選択手段10aの出力よりイ
ンタフェース選択手段9aより計算m1よりのアドレス
、制御信号21aを選択し記憶部12aより読み出し動
作を実行する。
It receives the control signal and writes its contents to address α in the storage section 12b. This transfer operation is executed from address O of the main system to the maximum address of the shared storage device. When the transfer operation is executed up to the maximum address, a transfer operation end signal is sent from the transfer operation control means 11a of the main system to the transfer operation control means 11b of the slave system. When the slave transfer operation control means 11b receives this end signal, it resets a register (not shown) indicating that the transfer operation is in progress. Next, a case will be described in which an access activation request signal is sent from a computer during a transfer operation. Assuming that the access activation request signal is sent from the computer 1, if this access activation request is a read request, the slave shared storage device 4 has a flag set indicating that it is in the process of transferring. A read operation is not executed from the slave system, but only from the main system. The operation is main system access activation request selection means 1
From the output of the access activation request selection means 10a, the interface selection means 9a selects the address and control signal 21a from the calculation m1, and executes the read operation from the storage section 12a. .

計算mlよりのアクセス起動要求が書き込み要求であっ
た場合には、上記フラグは無視されて主系。
If the access activation request from the calculation ml is a write request, the above flag is ignored and the access is sent to the main system.

従系のアクセス起動要求選択手段10a、10bよりア
クセス起動要求信号22a、22cを選択し、アクセス
起動要求選択手段10a、10bの出力よりインタフェ
ース選択手段9a、9bよりアドレス、データ、制御信
号21a、21cを選択し、記憶部12a、12bに書
き込み動作を実行する。次に、転写動作中でない場合の
計算機よりのアクセス起動要求については転写動作中の
書き込み要求の場合に準する。転写動作の主系と従系が
逆になった場合でも同様に動作することは言うまでもな
い。従って、転写動作中でも計算機からのアクセス起動
要求をほとんど待たせることなく実行することが可能と
なる。
The access activation request signals 22a and 22c are selected from the access activation request selection means 10a and 10b of the slave system, and the address, data, and control signals 21a and 21c are selected from the interface selection means 9a and 9b based on the output of the access activation request selection means 10a and 10b. is selected, and a write operation is executed to the storage units 12a and 12b. Next, an access activation request from a computer when a transfer operation is not in progress corresponds to a write request during a transfer operation. It goes without saying that even if the main system and slave system of the transfer operation are reversed, the same operation will occur. Therefore, even during the transfer operation, it is possible to execute the access activation request from the computer without having to wait for it.

なお、計算機、共存記憶装置はぞれぞれ2個のものとし
て説明したが、それ以上設けても本発明は同様に適用で
きる。
Although the description has been made assuming that there are two computers and two co-existing storage devices, the present invention can be similarly applied even if more than two computers and co-located storage devices are provided.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば共有記憶装置を転写専
用のインタフェースで接続し、転写中、転写がなされて
いる共有記憶装置に対し読み出しアクセスを禁止し、他
のアクセスを可能としたので転写動作中でも計算機より
アクセス起動要求をほとんど待たせることなく実行する
ことができ、オンライン処理を行う計算機システムにも
使用することのできる二重化共有記憶装置を提供できる
As described above, according to the present invention, a shared storage device is connected through an interface dedicated to transcription, and during transcription, read access to the shared storage device being transcribed is prohibited, while other accesses are enabled. It is possible to provide a duplex shared storage device that can execute an access activation request from a computer almost without waiting even during operation, and can also be used in a computer system that performs online processing.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例による記憶制御装置の制御
方式のブロック図である。第2図は第1図における共有
記憶装置の具体的構成例である。 第3図は従来の一例による二重化共有記憶装置のブロッ
ク図である。 1.2は計算機、3,4は共有記憶装置、5は転写専用
ハードウェア、6,7は計算機−共有記憶装置間インタ
フェース、8は共有記憶装置間インタフェース、9はイ
ンタフェース選択手段、10はアクセス起動要求選択手
段、11は転写動作制御手段、12は記憶部である。 代理人  大  岩  増  雄(ほか2名)嘉3図 手続補正書(自発) 28発明の名称 記j’5J+損嚇置の匍捕防式 3、補正をする者 5、?!正の対象 特許請求の範囲、発明の詳細な説明の欄。 6、 補正の内容 (1)特許請求の範囲を別紙の通り補正する。 (2)明細書第4頁第9行目、第14行目「送出されて
」とあるのを「送出して」と補正する。 (3)同書第6頁第20行目乃至第7頁第2行目「フェ
ース信号、−・・・−・インタフェースである。jとあ
るのを「フェース信号である。」と補正する。 (4)同書第7頁第4行目「憶装置4へ向かって」とあ
るのを「憶装置4に対して」と補正する。 (5)同書第6頁第20行目「この終了信号を受とると
」とあるのを「この終了信号を受けとると」と補正する
。 以上 2、特許請求の範囲 (1)第1.第2計算機の両方によりアクセス可能な第
1.第2共有記憶装置を備えた記憶制御装置の制御方式
において、上記第1.第2共有記↑、α装置間を転写専
用のインタフェースで接続し、両共有記憶装置間で情報
の転写を可能とし、かつ転写中、上記他方の共有記憶装
置に転写がなされていることを示すフラグをセットし、 第1.第2計算機のいずれかより両共有記憶装置に読み
出しのアクセス起動要求があったとき上記フラグがセッ
トされていない方の一方の共有記憶装置のみから情報の
読み出しがなされるようにし、書き込みのアクセス起動
要求があったとき上記フラグを無視して両共有記1.α
装五に情報を書込むようにしたことを特徴とする記憶制
御装置の制御方式。 (2)他方の共有記t、a装置からのインタフェースか
、第1計算機からのインタフェースかユ第2計算機から
のインタフェースかのいずれかを選択するインタフェー
ス選択手段と、他方の共有記i50装置と第1.第2計
算機のそれぞれのアクセス起動要求信号のうちいずれか
を取込むアクセス起動要求選択手段と、上記インタフェ
ース選択手段とアクセス起動要求選択手段を制御する転
写動作制御手段を各共有記憶手段に設けたことを特徴と
する記1,9制御装置の制御方式。
FIG. 1 is a block diagram of a control system for a storage control device according to an embodiment of the present invention. FIG. 2 shows a specific example of the configuration of the shared storage device shown in FIG. FIG. 3 is a block diagram of a duplex shared storage device according to an example of the conventional art. 1.2 is a computer, 3 and 4 are shared storage devices, 5 is dedicated transcription hardware, 6 and 7 are computer-shared storage device interfaces, 8 is a shared storage device interface, 9 is an interface selection means, and 10 is an access device. 11 is a transfer operation control means, and 12 is a storage section. Agent: Masuo Oiwa (and 2 others) Ka3 figure procedural amendment (voluntary) 28 Invention title j'5J + damage placement prevention type 3, person making the amendment 5, ? ! Positive claims and detailed description of the invention. 6. Contents of amendment (1) The scope of claims will be amended as shown in the attached sheet. (2) In the 9th and 14th lines of page 4 of the specification, the words ``sent out'' should be corrected to ``sent out''. (3) From the 20th line of page 6 to the 2nd line of page 7 of the same book, ``Face signal, . . . interface.j'' is corrected to ``Face signal.'' (4) In the fourth line of page 7 of the same book, the phrase "towards storage device 4" is amended to read "toward storage device 4." (5) In the 20th line of page 6 of the same book, the phrase ``When this end signal is received'' is corrected to ``When this end signal is received.'' Above 2, Claim (1) No. 1. The first. which is accessible by both the second computer. In the control method of a storage control device including a second shared storage device, the first. Second shared note ↑, indicates that the α devices are connected by an interface dedicated to transcription, information can be transferred between both shared storage devices, and that information is being transferred to the other shared storage device during transcription. Set the flag, 1st. When there is a read access activation request from either of the second computers to both shared storage devices, information is read only from the one shared storage device for which the above flag is not set, and write access is activated. When a request is made, the above flag is ignored and both shared notes 1. α
A control method for a storage control device, characterized in that information is written to a storage device. (2) Interface selection means for selecting either the interface from the other shared storage device t, a, the interface from the first computer, or the interface from the second computer; 1. Each shared storage means is provided with an access activation request selection means for receiving one of the access activation request signals of each of the second computers, and a transfer operation control means for controlling the interface selection means and the access activation request selection means. A control method of the control device described in 1 and 9 below.

Claims (2)

【特許請求の範囲】[Claims] (1)第1、第2計算機の両方によりアクセス可能な第
1、第2共有記憶装置を備えた記憶制御装置の制御方式
において、上記第1、第2共有記憶装置間を転写専用の
インタフェースで接続し、両共有記憶装置間で情報の転
写を可能とし、かつ転写中、上記他方の共有記憶装置に
転写がなされていることを示すフラグをセットし、 第1、第2計算機のいずれかより両共有記憶装置に読み
出しのアクセス起動要求があったとき上記フラグがセッ
トされていない方の一方の共有記憶装置のみから情報の
読み出しがなされるようにし、書き込みのアクセス起動
要求があったとき上記フラグを無視して両共有記憶装置
に情報を書込むようにしたことを特徴とする記憶制御装
置の制御方式。
(1) In a control method for a storage control device equipped with first and second shared storage devices that can be accessed by both the first and second computers, an interface dedicated to transfer is used between the first and second shared storage devices. connection, enable the transfer of information between both shared storage devices, and set a flag indicating that information is being transferred to the other shared storage device during the transfer, from either the first or second computer. When there is a read access activation request for both shared storage devices, information is read from only one of the shared storage devices for which the above flag is not set, and when there is a write access activation request, the above flag is set. 1. A control method for a storage control device, characterized in that information is written to both shared storage devices while ignoring.
(2)他方の共有記憶装置からのインタフェースか、第
1計算機からのインタフェースか第2計算機からのイン
タフェースかのいずれかを選択するインタフェース選択
手段と、他方の共有記憶装置と第1、第2計算機のそれ
ぞれのアクセス起動要求信号のうちいずれかを取込むア
クセス起動要求選択手段と、上記インタフェース選択手
段とアクセス起動要求選択手段を制御する転写動作制御
手段を各共有記憶手段に設けたことを特徴とする記憶制
御装置の制御方式。
(2) Interface selection means for selecting either the interface from the other shared storage device, the interface from the first computer, or the interface from the second computer, and the other shared storage device and the first and second computers. Each shared storage means is provided with an access activation request selection means for receiving one of the access activation request signals, and a transfer operation control means for controlling the interface selection means and the access activation request selection means. A control method for storage control devices.
JP61212472A 1986-09-09 1986-09-09 Control system for storage controller Pending JPS6367669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61212472A JPS6367669A (en) 1986-09-09 1986-09-09 Control system for storage controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61212472A JPS6367669A (en) 1986-09-09 1986-09-09 Control system for storage controller

Publications (1)

Publication Number Publication Date
JPS6367669A true JPS6367669A (en) 1988-03-26

Family

ID=16623209

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61212472A Pending JPS6367669A (en) 1986-09-09 1986-09-09 Control system for storage controller

Country Status (1)

Country Link
JP (1) JPS6367669A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03148737A (en) * 1989-11-06 1991-06-25 Nippon Telegr & Teleph Corp <Ntt> Memory data coincidence control system for duplex memory device
JPH04364562A (en) * 1990-09-26 1992-12-16 Honeywell Inc Method of ensuring data stored in primary database and secondary database in process control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03148737A (en) * 1989-11-06 1991-06-25 Nippon Telegr & Teleph Corp <Ntt> Memory data coincidence control system for duplex memory device
JPH04364562A (en) * 1990-09-26 1992-12-16 Honeywell Inc Method of ensuring data stored in primary database and secondary database in process control system

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