JPS6365714A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To improve the standby leakage characteristic by lowering a voltage fed to an internal circuit positively at the standby mode so as to reduce the leakage current. CONSTITUTION:Since a detection circuit 4 does not detect a standby signal at the normal operating state, a power supply circuit 3 supplies a power voltage to an internal circuit 10 and the internal circuit 10 is operated by a power voltage. In generating a standby instruction from an arithmetic circuit 14, an oscillation circuit 11 stops the oscillation, the internal circuit enters the standby mode and the detection circuit 4 generates a detection signal and the circuit 3 supplies a voltage of a constant voltage source 2 to the internal circuit 10. The standby state of the internal circuit 10 is maintained at a very low voltage in the semiconductor integrated circuit of CMOS structure. When the standby mode is released by the input from an external interruption input terminal 5, the oscillation circuit 11 starts the oscillation to restart the normal operation.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit, and more particularly to a CMO3 structure semiconductor integrated circuit having a standby mode.

[Conventional technology]

Traditionally, semiconductor integrated circuits with a CMO3 structure have a so-called standby mode that takes advantage of the CMO3 feature that current flows only when the clock is ON or OFF, setting the system clock to 0FFL and reducing the power consumption of the entire circuit. There are many.

[Problem that the invention seeks to solve]

In the standby mode of the conventional CMO3 structure mentioned above,
By stopping the system clock, the through current and charging/discharging current of the CMO3 circuit can be eliminated, and for circuits where current is constantly flowing, a transistor switch can be inserted in series, and the transistor can be turned off using the standby mode signal. Although the power consumption of the entire circuit has been reduced, in the standby mode described above, if there is a defect in an element constituting the circuit, the power consumption in the standby/r mode increases due to the current flowing to the defective part. Leakage due to this defect can be divided into junction-type and channel-type leakage, but generally speaking, the higher the degree of integration, the higher the rate of occurrence, and the higher the level of leakage current.

[Means for solving problems]

The semiconductor integrated circuit of the present invention includes a detection circuit that detects a standby mode that stops a clock and reduces power consumption of the circuit, a constant voltage source that generates a voltage lower than an externally supplied power supply voltage, and the detection circuit. and a power supply circuit that switches between the power supply voltage and the constant voltage source according to a signal and supplies it to the internal circuit, and in a normal state, the power supply voltage side is supplied to the internal circuit, and in standby mode, the power supply from the constant voltage source side is supplied to the internal circuit. It is characterized by

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. 1
is a power supply terminal, 2 is a constant voltage source that generates a voltage lower than the power supply voltage, 3 is a power supply circuit that switches the voltage from power supply terminal 1 and constant voltage source 2 and supplies it to the internal circuit, 4 detects a standby signal a detection circuit 1 which transmits the signal to a power supply circuit 3;
0 is an internal circuit operated by the power supplied by the power supply circuit 3, 5 is an interrupt input terminal from the outside,
11 is an oscillation circuit, 12 is a ROM that stores programs and instruction flows, 13 is an input/output circuit, 14 is an arithmetic circuit that performs various calculation controls, and 15 is a RAM that stores data, etc.
It is.

In normal operating conditions, the detection circuit 4 does not detect the standby signal and therefore does not generate a detection signal to the power supply circuit 3. Therefore, the power supply circuit 3 supplies the power supply voltage to the internal circuit 10, and the Circuit 10 operates on power supply voltage.

Next, when a standby command is generated from the arithmetic circuit 14, the oscillation circuit 11 stops oscillating, the internal circuit enters standby mode, and at the same time the detection circuit 4 generates a detection signal, and the power supply circuit 3 outputs a detection signal to the internal circuit 10. Supply voltage from constant voltage source 2. In the internal circuit 10, even when the clock is stopped in a CMO3 structure semiconductor integrated circuit, either the P-type or N-type transistor is ON, so the internal circuit 10 is
The voltage supplied to 0 only needs to be slightly higher than the threshold of the P-type or N-type transistor;
．． The standby state of the internal circuit 10 can be maintained at a voltage of about 3 to 1.5 V).

Next, when the standby mode is canceled by an input from the external interrupt input terminal 5, the oscillation circuit 11 starts oscillating, and at the same time the detection signal from the detection circuit 4 stops, so the power supply circuit 3 10 and resumes normal operation.

Normally, in a semiconductor integrated circuit with a CMO3 structure, leakage current due to a defect is greatly affected by the supply voltage, and the lower the voltage, the smaller the leakage current is.If the present invention is applied, even if there is a slight leakage defect, By supplying a low voltage to the internal circuitry during standby, leakage current can be reduced, making it possible to significantly improve leakage current characteristics.

〔Effect of the invention〕

As explained above, the present invention can reduce leakage current for mild leakage due to defects and channel leakage by actively lowering the voltage supplied to internal circuits during standby mode. It has the effect of significantly improving standby leak characteristics.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Power supply terminal, 2... Constant voltage source, 3... Power supply circuit, 4... Detection circuit, 5... External interrupt terminal, 10... Internal circuit 6

Claims (1)

[Claims] A detection circuit detects a standby mode in which the clock is stopped to reduce power consumption of the circuit, a constant voltage source generates a voltage lower than an externally supplied power supply voltage, and a signal from the detection circuit detects the power supply voltage and the constant voltage. A semiconductor integrated circuit comprising: a power supply circuit that switches between a voltage source and a power source to supply an internal circuit, and supplies the internal circuit with power from the power supply voltage side in a normal state and from the constant voltage source side in a standby mode. circuit.