JPS6355618U - - Google Patents
Info
- Publication number
- JPS6355618U JPS6355618U JP14861886U JP14861886U JPS6355618U JP S6355618 U JPS6355618 U JP S6355618U JP 14861886 U JP14861886 U JP 14861886U JP 14861886 U JP14861886 U JP 14861886U JP S6355618 U JPS6355618 U JP S6355618U
- Authority
- JP
- Japan
- Prior art keywords
- amplifier circuit
- external
- output terminal
- external device
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Amplifiers (AREA)
- Control Of Amplification And Gain Control (AREA)
Description
第１図は本考案の外部出力用増幅回路の一実施
例を示す回路図、第２図は本考案の他の実施例を
示す回路図、第３図は映像出力端子を有するテレ
ビジヨン受像機のブロツク図、第４図は外部出力
用増幅回路の従来例を示す回路図である。
Ｑ１，Ｑ２…トランジスタ、Ｖ１…電源、Ａ…
入力端子、Ｒ１〜Ｒ８…抵抗、Ｃ１〜Ｃ３…コン
デンサ。
Fig. 1 is a circuit diagram showing one embodiment of the external output amplifier circuit of the present invention, Fig. 2 is a circuit diagram showing another embodiment of the invention, and Fig. 3 is a television receiver having a video output terminal. FIG. 4 is a circuit diagram showing a conventional example of an external output amplifier circuit. Q1 , Q2 ...transistor, V1 ...power supply, A...
Input terminals, R1 to R8 ...resistors, C1 to C3 ...capacitors.
Claims (1)
ための増幅回路と、 この増幅回路の出力端に外部機器を着脱自在に
接続するための外部出力端子と、 この外部出力端子に外部機器を接続したときは
前記増幅回路を動作状態とし、外部機器を接続し
ないときは前記増幅回路を不動作状態とする回路
手段とを具備したことを特徴とする外部出力用増
幅回路。[Claims for Utility Model Registration] An amplifier circuit for amplifying and outputting a signal supplied as an input, an external output terminal for detachably connecting an external device to the output terminal of this amplifier circuit, and this external An external output amplifier circuit characterized by comprising circuit means for setting the amplifier circuit in an operating state when an external device is connected to an output terminal, and putting the amplifier circuit in an inactive state when no external device is connected. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14861886U JPS6355618U (en) | 1986-09-30 | 1986-09-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14861886U JPS6355618U (en) | 1986-09-30 | 1986-09-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6355618U true JPS6355618U (en) | 1988-04-14 |
Family
ID=31063061
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14861886U Pending JPS6355618U (en) | 1986-09-30 | 1986-09-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6355618U (en) |
-
1986
- 1986-09-30 JP JP14861886U patent/JPS6355618U/ja active Pending
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