JPS6354219B2 - - Google Patents

Info

Publication number
JPS6354219B2
JPS6354219B2 JP56186106A JP18610681A JPS6354219B2 JP S6354219 B2 JPS6354219 B2 JP S6354219B2 JP 56186106 A JP56186106 A JP 56186106A JP 18610681 A JP18610681 A JP 18610681A JP S6354219 B2 JPS6354219 B2 JP S6354219B2
Authority
JP
Japan
Prior art keywords
module
film
outer lead
window
carrier element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56186106A
Other languages
Japanese (ja)
Other versions
JPS57145354A (en
Inventor
Hotsupe Yoahimu
Hahiri Teerani Yaaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GEE AA OO G FUYUURU AUTOMATSUIOON UNTO ORUGANIZATSUIOON MBH
Original Assignee
GEE AA OO G FUYUURU AUTOMATSUIOON UNTO ORUGANIZATSUIOON MBH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GEE AA OO G FUYUURU AUTOMATSUIOON UNTO ORUGANIZATSUIOON MBH filed Critical GEE AA OO G FUYUURU AUTOMATSUIOON UNTO ORUGANIZATSUIOON MBH
Publication of JPS57145354A publication Critical patent/JPS57145354A/en
Publication of JPS6354219B2 publication Critical patent/JPS6354219B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Description

【発明の詳細な説明】 本発明は、接触フレームのリード部の一端（外
側リード部）をモジユールの対応する端子に接続
し他端を接触表面と合体させるように、スパイダ
ー状のパターンを有した接触フレームに結合して
いるICモジユール用のキヤリア要素に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention has a spider-like pattern so that one end of the lead part (outer lead part) of the contact frame is connected to the corresponding terminal of the module and the other end is merged with the contact surface. Concerning a carrier element for an IC module coupled to a contact frame.

通常、ICモジユールはモジユール寸法に対し
て大きな容積を有した取扱いの容易なケース例え
ばいわゆる「デユアルインラインパツケージ」に
組込まれる。しかしこの方法は、特に複雑な回路
装置の場合にそれをできるだけ小さなスペースに
収容すべき場合には不都合である。 Typically, an IC module is assembled into a case that has a large volume relative to the module dimensions and is easy to handle, such as a so-called "dual in-line package." However, this method is disadvantageous, especially when complex circuit arrangements are to be accommodated in as little space as possible.

従つて、ICモジユールを封入しない形に加工
して、取扱いを容易にするためにモジユールを例
えばフイルム片上に取付ける方法が提案されてい
る。このような方法としては、いわゆる「マイク
ロパツク装置」（Siemens社の刊行物“bauteile
report”16，1978，Book2，p.40―44参照）が知
られており、このマイクロパツク装置は回路装置
（時計、補聴器等の回路）を組込む容積が非常に
限られている場合に有利である。 Therefore, a method has been proposed in which the IC module is processed into a non-encapsulated form and the module is mounted, for example, on a piece of film in order to facilitate handling. Such methods include the so-called "micropack device" (see the Siemens publication "bauteile").
report” 16, 1978, Book 2, p. 40-44), and this micropack device is advantageous when the volume for incorporating circuit devices (circuits for watches, hearing aids, etc.) is extremely limited. be.

前記の装置に用いられる基礎材料は熱安定性の
フイルム片である。このフイルム片にはモジユー
ルの寸法に合つた等間隔の窓が穴明けされる。こ
のフイルム片に導電性材料を塗布し、この導電性
材料からエツチングによつてリード部を形成す
る。リード部の支持されない末端は窓帯域に伸び
るように形成される。最後にモジユールの端子を
対応するリード部末端に接続する。リード部の開
放端は、自由に接近できる接触表面に伸び、窓帯
域の周囲に円形にフイルム上に配置される。この
ように、マイクロパツク装置は必要ならば例えば
通常の構造の印刷回路に手でハンダ付けすること
もできる。 The basic material used in the device described above is a piece of heat-stable film. This piece of film is punched with equally spaced windows that match the dimensions of the module. A conductive material is applied to this film piece, and lead portions are formed from the conductive material by etching. The unsupported ends of the leads are configured to extend into the window zone. Finally, connect the terminals of the module to the ends of the corresponding leads. The open ends of the leads extend to a freely accessible contact surface and are arranged on the film in a circular manner around the window zone. In this way, the micropack device can be hand-soldered, for example, to a printed circuit of conventional construction, if desired.

また最近には、前記の種類の非封入モジユール
を例えばアイデンテイフイケーシヨンカードまた
は同様のデータキヤリアに組込むことが提案され
ている。この場合にはアイデンテイフイケーシヨ
ンカードはその日々の使用中に大きなひずみにさ
らされ、そのためその構造をできるだけ小さくす
るように意図されることを考慮に入れなければな
らない。他方、モジユールを取付けるフイルム上
の接触表面は最初から、例えば接触ピンによつて
カードをオートマトンに用いる時に直接に接触さ
せ得るように設計されなければならない。 It has also recently been proposed to incorporate non-encapsulated modules of the above-mentioned type into, for example, identification cards or similar data carriers. In this case it must be taken into account that the identification card is exposed to large strains during its daily use and that its structure is therefore intended to be as small as possible. On the other hand, the contact surfaces on the film on which the module is attached must be designed from the outset in such a way that they can be contacted directly when the card is used in an automaton, for example by means of contact pins.

前記の配列においては、接触表面はオートマト
ンにおけるガルバニツク接触の場合には最小限度
１―２mm2の面積を有しなければならないが、これ
らの接触表面は窓帯域の周囲に円状に配置され、
その全体配列はICモジユール自体よりもかなり
大きな寸法になる。 In the arrangement described, the contact surfaces, which must have a minimum area of 1-2 mm 2 in the case of galvanic contact in the automaton, are arranged in a circle around the window zone;
The entire array has dimensions significantly larger than the IC module itself.

本発明の目的は、従来の装置よりも良好にIC
モジユールに適合した小さな寸法を有したICモ
ジユール用キヤリア要素を提供することである。 It is an object of the present invention to provide a better IC than previous devices.
It is an object of the present invention to provide a carrier element for an IC module having small dimensions suitable for the module.

本発明の目的は、モジユールの周辺部内でモジ
ユールと接触しない側のフイルム上にモジユール
の上に接触表面を配置し、フイルム中の穴明けし
た窓によつて外側リード部をモジユールの対応端
子と接続することによつて達成される。 It is an object of the invention to place a contact surface on the module on the side of the film that does not contact the module within the periphery of the module, and to connect the outer leads with the corresponding terminals of the module by means of a perforated window in the film. This is achieved by doing.

本発明によれば、組込み容積が非常に小さい場
合に使用できる、ICモジユールの面積に適合し
た小型のフイルム結合したICキヤリア要素が得
られる。 The invention provides a compact film-bonded IC carrier element adapted to the area of the IC module, which can be used when the installation volume is very small.

ICキヤリア要素の寸法が小さいということは、
機械的応力にさらされる表面も小さいことを意味
する。この理由から、本発明のICキヤリア要素
は、使用中に大きな機械的応力を受けるキヤリア
例えばアイデンテイフイケーシヨンカードに組込
むのに特に適切である。 The small dimensions of the IC carrier element mean that
This also means that the surface area exposed to mechanical stress is small. For this reason, the IC carrier element of the invention is particularly suitable for incorporation into carriers, such as identification cards, which are subjected to high mechanical stress during use.

本発明をさらに添付図の具体例について説明す
る。 The present invention will be further explained with reference to specific examples shown in the accompanying drawings.

第１図および第２図に示す具体例において、
ICモジユール６はフイルム片１に取付けられる。
通常フイルム片例えばスーパー８フイルムに存在
するような送り穴２を、キヤリア要素の製造段階
でのフイルム移送のために使用できる。 In the specific example shown in FIGS. 1 and 2,
The IC module 6 is attached to the film piece 1.
Perforations 2, such as those normally present in film pieces, for example Super 8 film, can be used for transporting the film during the manufacturing stage of the carrier element.

接触表面４をフイルム片上に配置し、そのリー
ド部７（外側リード部）をICモジユール６の対
応端子８に接続する（第２図をも参照）。 The contact surface 4 is placed on the film strip and its leads 7 (outer leads) are connected to the corresponding terminals 8 of the IC module 6 (see also FIG. 2).

接触表面４の配置および面積は、キヤリア要素
を電気装置に結合させる時に例えば適切な接触ピ
ンを用いて直接に接触させ得るように選択する。
フイルム１に穴明けされた窓３上には外側リード
部７を配置する。好適な具体例においては、支持
されない外側リード部が窓帯域３中に伸びて接触
操作時に窓を通り抜けてICモジユールと接続さ
れ得るように、窓３を設計する。 The arrangement and area of the contact surfaces 4 are selected in such a way that direct contact can be made when coupling the carrier element to an electrical device, for example by means of suitable contact pins.
An outer lead part 7 is arranged on the window 3 made in the film 1. In a preferred embodiment, the window 3 is designed such that the unsupported outer lead extends into the window zone 3 and can be passed through the window and connected to the IC module during contact operation.

キヤリア要素の製造の第一段階では、フイルム
１を規定間隔でパンチング加工して、例えば第１
図のような窓３を有したパンチングパターンを得
る。次にフイルムの片面に導電層を塗布し、この
導電層からICモジユールの取付けに必要なリー
ド部４，７を既知技法によりエツチングする。 In the first stage of manufacturing the carrier element, the film 1 is punched at defined intervals, e.g.
A punching pattern with windows 3 as shown in the figure is obtained. A conductive layer is then applied to one side of the film, from which the leads 4, 7 necessary for mounting the IC module are etched using known techniques.

図示の具体例では、モジユールの周辺部内でモ
ジユール表面上のフイルム１に接触表面４が生
じ、モジユールに接続される外側リード部７が穴
明けされた窓の上に生じるようにリード部をエツ
チングする。 In the illustrated embodiment, the leads are etched in such a way that a contact surface 4 occurs in the periphery of the module on the film 1 on the surface of the module, and an outer lead 7 connected to the module occurs above the perforated window. .

キヤリア要素を完成するには、外側リード部７
をフイルムの穴明けされた窓３を通してICモジ
ユール６の端子８上に向け、ハンダ付けによつて
端子８に接続する。 To complete the carrier element, the outer lead part 7
is directed through the perforated window 3 of the film onto the terminal 8 of the IC module 6, and connected to the terminal 8 by soldering.

第２図に示すように、自在に取付けたモジユー
ルをフイルム１からある距離だけ離して接触させ
ることができる。後で用いる時にキヤリア要素を
組込むのに非常に小さな深さしか利用できない場
合には、モジユール６をフイルムに対して直接的
に例えば接着によつて外側リード部と接続でき
る。 As shown in FIG. 2, a freely mounted module can be brought into contact with the film 1 at a distance from it. If only a very small depth is available for installing the carrier element in subsequent use, the module 6 can be connected directly to the film, for example by gluing, with the outer lead.

第３図および第４図のキヤリア要素において
は、第一の例の場合よりも接近し合つた端子を有
するICモジユールをも取付けできるように接触
表面の外側リード部を作製する。 In the carrier elements of FIGS. 3 and 4, the outer leads of the contact surfaces are made so that IC modules with terminals that are closer together than in the first example can also be mounted.

第３図の具体例では、外側リード部１０をフイ
ルムの穴明け窓３を通してICモジユールの周囲
に曲げ、次にモジユールの端子に接続する。IC
モジユールは、曲げ工程前に適切な接着剤１２で
フイルム１に接着され、この工程中に確実に位置
決めされ得る。 In the embodiment of FIG. 3, the outer lead portion 10 is bent around the IC module through the perforated window 3 of the film and then connected to the terminals of the module. I C
The module is glued to the film 1 with a suitable adhesive 12 before the bending process so that it can be reliably positioned during this process.

第４図の具体例では、外側リード部１０を穴明
け窓３内を通して接触表面４と反対側のフイルム
面上に曲げた後にモジユール１１に接触させる。
モジユール１１の端子８を次にリード部１０と接
続する。 In the embodiment of FIG. 4, the outer lead 10 is passed through the perforated window 3 and bent onto the side of the film opposite the contact surface 4 before being brought into contact with the module 11.
The terminal 8 of the module 11 is then connected to the lead portion 10.

第５図はICモジユール１１をいわゆる接着技
法によつて接触させた本発明のキヤリア要素の具
体例を示す。この場合にはモジユール１１の端子
８を細い金線１５でフイルムの窓３を通して接触
表面の外側リード部に接続する。この具体例で
は、例えば第５図のように穴明け窓３を通り越し
て伸びた形の外側リード部１０が有用である。 FIG. 5 shows an embodiment of a carrier element according to the invention in which an IC module 11 is contacted by a so-called adhesive technique. In this case, the terminals 8 of the module 11 are connected with thin gold wires 15 through the film window 3 to the outer leads of the contact surface. In this embodiment, it is useful to have an outer lead 10 extending past the perforated window 3 as shown in FIG. 5, for example.

第６図は前側および後側８ａ，８ｂ上に端子を
有するICモジユール１１を接触させた本発明の
キヤリア要素の具体例を示す。使用される接触技
法は第２図および第３図に関して記した通りであ
る。 FIG. 6 shows an embodiment of the carrier element of the invention with contacting IC modules 11 with terminals on the front and rear sides 8a, 8b. The contacting technique used is as described with respect to FIGS. 2 and 3.

導電性フイルム被膜から接触表面をエツチング
できるが、その他にもキヤリアまたはフイルムま
たはその両方とは独立して別個の段階でいわゆる
「接触スパイダー」状に要素を作ることも知られ
ている。 Although contact surfaces can be etched from conductive film coatings, it is also known to produce elements in so-called "contact spiders" in a separate step, independent of the carrier and/or film.

外側リード部または接触表面を有した接触スパ
イダーは、例えば接触工程中に接着剤によつてフ
イルムに取付けるだけである。同じ段階において
外側リード部を、図に基づいて記したように、モ
ジユールの対応端子に接続できる。 The contact spider with its outer lead or contact surface is simply attached to the film, for example by adhesive during the contacting process. At the same stage, the outer leads can be connected to the corresponding terminals of the module as described in the figures.

この場合に用いられる接触表面は全て、共通フ
レーム、いわゆる接触スパイダーの要素であるか
ら、前記の方法において一緒に加工される。 The contact surfaces used in this case are all elements of a common frame, the so-called contact spider, and are therefore processed together in the method described.

他方、要素（接触表面とリード部を合わせたも
の）を単一片として作りこれらを本発明に従つて
加工することもできる。この場合には、例えば
「ラベリング原理」によつて、必要ならばキヤリ
アフイルムと接続されてもよい導電性材料から要
素をパンチングによつて形成できる。 On the other hand, it is also possible to make the elements (contact surfaces and leads together) as a single piece and process them according to the invention. In this case, the elements can be formed by punching, for example according to the "labeling principle", from an electrically conductive material which can be connected, if necessary, to a carrier film.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の装置の上面図、第２図は第１
図の装置の横断面図、第３―６図は本発明の別の
具体例を示す図である。 １……フイルム片、２……送り穴、３……窓帯
域、４……接触表面、６，１１……ICモジユー
ル、７，１０……リード部、８，８ａ，８ｂ……
端子、１２……接着剤、１５……金線。 FIG. 1 is a top view of the device of the present invention, and FIG.
The cross-sectional views of the apparatus shown in FIG. 3-6 are views showing another embodiment of the present invention. 1... Film piece, 2... Sprocket hole, 3... Window band, 4... Contact surface, 6, 11... IC module, 7, 10... Lead part, 8, 8a, 8b...
Terminal, 12...adhesive, 15...gold wire.

Claims (1)

【特許請求の範囲】 １ 接触フレームのリード部の一端（外側リード
部）をモジユールの対応する端子に接続しその他
端を接触表面に伸ばすようにスパイダー状のパタ
ーンを有した接触フレームに結合されるICモジ
ユール用のキヤリア要素において、フイルム１の
モジユール６，１１と接触しない側の接触表面４
を実質的にモジユール６，１１の周辺部内に配置
し、モジユール６，１１の対応する端子８，８
ａ，８ｂと外側リード部７，１０との接続をフイ
ルム１内の穴明けされた窓３を通して行なうこと
を特徴とするキヤリア要素。 ２ 外側リード部７を、窓３を通して窓３の帯域
内で端子８と直接接続することを特徴とする特許
請求の範囲第１項記載のキヤリア要素。 ３ 外側リード部１０が窓３の帯域を覆つてお
り、モジユールの端子８を接着技法によつて細い
金線１５で外側リード部１０の下側に接続したこ
とを特徴とする特許請求の範囲第１項記載のキヤ
リア要素。 ４ 外側リード部１０を、窓３を通してモジユー
ル１１の裏側に曲げ、このモジユール１１はフイ
ルム１に接着されていてもよく、さらに外側リー
ド部１０をモジユール１１の裏側の端子８に接続
したことを特徴とする特許請求の範囲第１項記載
のキヤリア要素。 ５ 外側リード部１０を、窓３を通してフイルム
の下側とモジユールの上側との間に入れ、モジユ
ールの上側に配置した端子８に接続したことを特
徴とする特許請求の範囲第１項記載のキヤリア要
素。 ６ 外側リード部の一部を、窓を通してモジユー
ル１１の裏側の端子部８ａに曲げ、このモジユー
ル１１はフイルムに接着されており、外側リード
部の他方の部分を、窓３の直下に配置された端子
８ｂに向けたことを特徴とする特許請求の範囲第
１項記載のキヤリア要素。[Claims] 1. Connected to a contact frame having a spider-like pattern so that one end (outer lead part) of the lead part of the contact frame is connected to a corresponding terminal of the module and the other end extends to the contact surface. Contact surface 4 on the side of the carrier element for the IC module that does not come into contact with the modules 6, 11 of the film 1
are arranged substantially within the periphery of the modules 6, 11 and the corresponding terminals 8, 8 of the modules 6, 11
A carrier element characterized in that the connection between a, 8b and the outer lead parts 7, 10 is made through a perforated window 3 in the film 1. 2. Carrier element according to claim 1, characterized in that the outer lead part 7 is connected directly through the window 3 to the terminal 8 in the zone of the window 3. 3. The outer lead part 10 covers the zone of the window 3, and the terminals 8 of the module are connected to the underside of the outer lead part 10 with thin gold wires 15 by adhesive techniques. Carrier element described in item 1. 4. The outer lead part 10 is bent to the back side of the module 11 through the window 3, this module 11 may be glued to the film 1, and the outer lead part 10 is further connected to the terminal 8 on the back side of the module 11. A carrier element according to claim 1. 5. The carrier according to claim 1, wherein the outer lead portion 10 is inserted between the lower side of the film and the upper side of the module through the window 3, and is connected to the terminal 8 arranged on the upper side of the module. element. 6. Bend a part of the outer lead part through the window to the terminal part 8a on the back side of the module 11, which is glued to the film, and bend the other part of the outer lead part to the terminal part 8a on the back side of the module 11, which is placed directly under the window 3. Carrier element according to claim 1, characterized in that it is directed towards the terminal 8b.
JP56186106A 1980-11-21 1981-11-19 Carrier element for ic module Granted JPS57145354A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE3043877 1980-11-21

Publications (2)

Publication Number Publication Date
JPS57145354A JPS57145354A (en) 1982-09-08
JPS6354219B2 true JPS6354219B2 (en) 1988-10-27

Family

ID=6117252

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56186106A Granted JPS57145354A (en) 1980-11-21 1981-11-19 Carrier element for ic module

Country Status (2)

Country Link
JP (1) JPS57145354A (en)
BE (1) BE891213A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0615275B2 (en) * 1987-04-13 1994-03-02 イビデン株式会社 Printed wiring board for IC card
GB2536064B (en) 2015-03-06 2017-06-07 Dyson Technology Ltd A suction nozzle for a vacuum cleaner

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4064552A (en) * 1976-02-03 1977-12-20 Angelucci Thomas L Multilayer flexible printed circuit tape
JPS5332382A (en) * 1976-09-03 1978-03-27 Suwa Seikosha Kk Flexible printed substrate structure for electronic wrist watch
JPS5826667B2 (en) * 1977-03-08 1983-06-04 松下電器産業株式会社 semiconductor equipment
JPS5811113B2 (en) * 1977-09-21 1983-03-01 松下電器産業株式会社 electronic circuit equipment
FR2439438A1 (en) * 1978-10-19 1980-05-16 Cii Honeywell Bull RIBBON CARRYING ELECTRIC SIGNAL PROCESSING DEVICES, MANUFACTURING METHOD THEREOF AND APPLICATION THEREOF TO A SIGNAL PROCESSING ELEMENT

Also Published As

Publication number Publication date
JPS57145354A (en) 1982-09-08
BE891213A (en) 1982-03-16

Similar Documents

Publication Publication Date Title
US4549247A (en) Carrier element for IC-modules
JP2786862B2 (en) Connection element
US6358772B2 (en) Semiconductor package having semiconductor element mounting structure of semiconductor package mounted on circuit board and method of assembling semiconductor package
US4949158A (en) Semiconductor device
JP2824275B2 (en) Electronic chip card manufacturing method
US4539472A (en) Data processing card system and method of forming same
US4889980A (en) Electronic memory card and method of manufacturing same
JPS62111794A (en) Card with element and micromodule, side surface thereof has contact
EP0209791A2 (en) Electronic memory card
JPH054483A (en) Method for producing identification card provided with ic chip
JPH06216487A (en) Connecting terminal part of flexible pattern
KR20000028753A (en) Process for manufacturing ic card
RU2328840C2 (en) Method of electronic component installation on base
JPS6354219B2 (en)
JP2001053529A (en) Manufacture of antenna substrate
US6305074B1 (en) Support for integrated circuit and process for mounting an integrated circuit on a support
JP2007034786A (en) Composite ic card and its manufacturing method
JP3409380B2 (en) Printed circuit board device
JP3097410B2 (en) Thermocompression bonding equipment for electronic components
RU2168798C2 (en) Semiconductor device and its manufacturing process
JPH11149535A (en) Radio module
JP2000194818A (en) Ic card, ic module and lead frame
KR100351462B1 (en) Manufacturing method for ic card
JP2000194817A (en) Ic card, ic module and lead frame
EP0661778A2 (en) Method and apparatus for providing electrical power to electronic devices enclosed in a chip carrier