JPS6342151A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6342151A JPS6342151A JP18631286A JP18631286A JPS6342151A JP S6342151 A JPS6342151 A JP S6342151A JP 18631286 A JP18631286 A JP 18631286A JP 18631286 A JP18631286 A JP 18631286A JP S6342151 A JPS6342151 A JP S6342151A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- lead frame
- lead
- plating film
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 28
- 239000011347 resin Substances 0.000 claims abstract description 52
- 229920005989 resin Polymers 0.000 claims abstract description 52
- 238000007747 plating Methods 0.000 claims abstract description 15
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 7
- 239000012535 impurity Substances 0.000 abstract description 3
- 238000007789 sealing Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 13
- 239000000463 material Substances 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 3
- 238000001721 transfer moulding Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 235000017166 Bambusa arundinacea Nutrition 0.000 description 1
- 235000017491 Bambusa tulda Nutrition 0.000 description 1
- 240000007049 Juglans regia Species 0.000 description 1
- 235000009496 Juglans regia Nutrition 0.000 description 1
- 101150034459 Parpbp gene Proteins 0.000 description 1
- 244000082204 Phyllostachys viridis Species 0.000 description 1
- 235000015334 Phyllostachys viridis Nutrition 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000011425 bamboo Substances 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000012508 resin bead Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 230000008961 swelling Effects 0.000 description 1
- 235000020234 walnut Nutrition 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置に関し、特に樹脂封止半導体装置
の構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to the structure of a resin-sealed semiconductor device.
従来、樹脂封止半導体装置は、第３図に示すようにリー
ドフレーム１０の素子搭載部１に半導体素子２を搭載し
、半導体素子２の電極とリードフレーム１０のリード３
の先端部をＡｕワイヤー４でボンディングする。リード
３．Ａｕワイヤー４゜半導体素子２は、外力や外気から
の保護のために半導体素子２の周囲に樹脂１２を成形す
る樹脂モールド等によって封止される。一般的に、この
樹脂モールドにトランスファモールド法が使用されてい
る。Conventionally, a resin-sealed semiconductor device has a semiconductor element 2 mounted on an element mounting portion 1 of a lead frame 10, as shown in FIG.
The tip of the wire is bonded with an Au wire 4. Lead 3. The Au wire 4° semiconductor element 2 is sealed with a resin mold or the like in which a resin 12 is formed around the semiconductor element 2 for protection from external forces and outside air. Generally, a transfer molding method is used for this resin mold.
このトランスファモールド法は、第２図に示すように、
上下の金型８，９間に前述したような素子搭載部１上に
半導体素子２が搭載され、ワイヤー４がボンディングさ
れたリードフレーム１０を挟み込み、樹脂を金型のゲー
トより全８，９間のキャビティに圧入し、樹脂を硬化さ
せ半導体素子２を封入する。This transfer molding method, as shown in Figure 2,
The semiconductor element 2 is mounted on the element mounting part 1 as described above and the lead frame 10 to which the wire 4 is bonded is sandwiched between the upper and lower molds 8 and 9, and the resin is poured from the gate of the mold between the molds 8 and 9. The semiconductor element 2 is press-fitted into the cavity, the resin is hardened, and the semiconductor element 2 is encapsulated.
上述した従来の半導体装置は、リードフレーム１０の板
厚のバラツキ、金型８，９の精度、金型８．９の摩滅等
により、成形された樹脂１２に第３図に示す様な樹脂バ
リ１１が発生してしまう。The conventional semiconductor device described above has resin burrs on the molded resin 12 as shown in FIG. 11 will occur.
樹脂バリ１１は、封入後、外部処理として施されるめっ
き処理の妨げになり、半導体装置実装時の半田付は性に
大きな影響を与える。このため、樹脂パリ１１を除去す
る工程が必要であり、一般的に物理的に除去する方法と
して、くるみを砕いた粉、樹脂ビーズ等によるホーニン
グ、高圧水を吹き付ける方法等があり、化学的にはアル
カリ液。The resin burr 11 interferes with the plating process that is performed as an external process after encapsulation, and has a large effect on soldering properties during semiconductor device mounting. For this reason, a process is required to remove the resin pari 11, and general methods for physically removing it include honing with crushed walnut powder, resin beads, etc., and spraying with high-pressure water. is an alkaline solution.
有機溶剤等で樹脂を膨潤させる方法がある。また、両方
法を併用する方法もある。There is a method of swelling the resin with an organic solvent or the like. There is also a method of using both methods together.
しかし、いずれの方法を使用しても樹脂１２とリードフ
レーム１０の界面の密着性を損うことになり、水及びイ
オン性不純物の半導体装置内への浸入を容易にさせてし
まう。水及びイオン性不純物はワイヤー４を介して半導
体素子２の電極に達して電極のアルミニウムの腐食に至
らしめ、その結果電気的導通不良等の問題が発生する。However, whichever method is used, the adhesion between the resin 12 and the lead frame 10 will be impaired, making it easier for water and ionic impurities to penetrate into the semiconductor device. Water and ionic impurities reach the electrodes of the semiconductor element 2 via the wires 4 and corrode the aluminum of the electrodes, resulting in problems such as poor electrical continuity.
このように従来の半導体装置は、水等の浸入を防止して
電気的導通不良を完全に防止するのが困難で、それだけ
信頼性が低くなってしまうという欠点がある。As described above, conventional semiconductor devices have the disadvantage that it is difficult to completely prevent electrical continuity defects by preventing the infiltration of water and the like, resulting in lower reliability.
〔問題点を解決するための手段〕
本発明の半導体装置は、半導体素子とリードの内側の先
端部を封入する第１の樹脂と、前記リードの前記第１の
樹脂で封入された部分以外の外側の部分をめっきしため
っき被膜と、前記第１の樹脂を封入する第２の樹脂とを
含んで構成される。[Means for Solving the Problems] The semiconductor device of the present invention includes a first resin that encapsulates the semiconductor element and the inner tip portion of the lead, and a portion of the lead that is not encapsulated with the first resin. It is configured to include a plating film on which the outer portion is plated, and a second resin that encapsulates the first resin.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例の断面図である。リードフレ
ーム１０の素子搭載部１に半導体素子２を搭載し、半導
体素子２の電極とリードフレーム１０のリード３の先端
にワイヤー４をボンディングし、第１の樹脂５で封入す
る。その時、発生する樹脂５の樹脂パリは取らないでリ
ードフレーム１０の外部リードのめつき被膜６を形成す
る。FIG. 1 is a sectional view of an embodiment of the present invention. A semiconductor element 2 is mounted on an element mounting part 1 of a lead frame 10, and a wire 4 is bonded to the electrode of the semiconductor element 2 and the tip of a lead 3 of the lead frame 10, and the wires 4 are sealed with a first resin 5. At this time, the plating film 6 of the external lead of the lead frame 10 is formed without removing the resin flakes of the resin 5 generated.
さらに、樹脂５の外側を第２の樹脂７で封入し、モール
ド外形を形成する。この場合、めっき被膜６がクツショ
ン材になりリードフレーム１０と金型８，９間に発生す
る樹脂パリを抑制する。また樹脂パリが発生してもすで
にめっき被膜６が形成されているため樹脂パリを除去す
る必要はない。Furthermore, the outside of the resin 5 is sealed with a second resin 7 to form a mold outer shape. In this case, the plating film 6 acts as a cushioning material and suppresses resin flakes generated between the lead frame 10 and the molds 8 and 9. Further, even if resin flash occurs, since the plating film 6 has already been formed, there is no need to remove the resin flash.
その後、捺印、リード成形等の工程を経て半導体装置が
完成される。Thereafter, the semiconductor device is completed through processes such as stamping and lead molding.
めっき被膜６をＳｎ又は５ｎ−Ｐｂめつきとすれば、樹
脂７はＳｎ又は５ｎ−Ｐｂめつきと密着するため、樹脂
７はリードフレーム素材と直接密着させるより密着性が
良くなる。If the plating film 6 is made of Sn or 5n-Pb plating, the resin 7 will be in close contact with the Sn or 5n-Pb plating, so that the resin 7 will have better adhesion than if it is brought into direct contact with the lead frame material.
また、第１及び第２の樹脂は同じ材料でも良いが、第１
の樹脂を耐湿性のよい高純度、低応力樹脂とし第２の樹
脂を樹脂パリ発生の少ない樹脂とすることもできる。Further, the first and second resins may be made of the same material, but the first and second resins may be made of the same material.
It is also possible to use a high-purity, low-stress resin with good moisture resistance as the first resin, and use a resin with less occurrence of resin flakes as the second resin.
なお、本実施例では、トランスファー封入で説明したが
その他の方法、例えば、ボッティング。In addition, although transfer encapsulation was explained in this example, other methods such as botting may be used.
キャスティング等でもよい。Casting etc. may also be used.
以上説明したように本発明は、２回の樹脂封入の間に外
部リードのめっき処理を施こすことにより、樹脂パリ除
去工程を通さなくてよいため樹脂とリードフレームとの
密着を阻害されることがない。従って、樹脂とリードフ
レーム界面からの水の浸入を防ぐことができるため、高
信頼性の半導体装置を得ることができる効果がある。As explained above, in the present invention, by plating the external leads between two times of resin encapsulation, there is no need to go through the process of removing resin debris, which prevents the adhesion between the resin and the lead frame. There is no. Therefore, since it is possible to prevent water from entering from the interface between the resin and the lead frame, it is possible to obtain a highly reliable semiconductor device.
第１図は本発明の半導体装置の一実施例の断面図、第２
図はトランスファモールド法の説明図、第３図は第２図
で成形された従来の半導体装置の断面図である。
１・・・素子搭載部、２・・・半導体素子、３・・・リ
ード、４・・・ワイヤー、５，７．１２・・・樹脂、６
・・・めっき被膜、８．９・・・封入金型、１０・・・
リードフレーム、１１・・・樹脂パリ。
消１旧
箭２図FIG. 1 is a sectional view of one embodiment of the semiconductor device of the present invention, and FIG.
The figure is an explanatory diagram of the transfer molding method, and FIG. 3 is a sectional view of a conventional semiconductor device molded as shown in FIG. DESCRIPTION OF SYMBOLS 1...Element mounting part, 2...Semiconductor element, 3...Lead, 4...Wire, 5,7.12...Resin, 6
...Plating film, 8.9...Enclosed mold, 10...
Lead frame, 11...Resin Paris. Erase 1 old bamboo 2 map
Claims (1)
脂と、前記リードの前記第１の樹脂で封入された部分以
外の外側の部分をめっきしためっき被膜と、前記第１の
樹脂を封入する第２の樹脂とを含むことを特徴とする半
導体装置。A first resin that encapsulates the semiconductor element and the inner tip of the lead, a plating film that plated an outer portion of the lead other than the portion encapsulated with the first resin, and encapsulates the first resin. A semiconductor device comprising a second resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18631286A JPS6342151A (en) | 1986-08-08 | 1986-08-08 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18631286A JPS6342151A (en) | 1986-08-08 | 1986-08-08 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6342151A true JPS6342151A (en) | 1988-02-23 |
Family
ID=16186128
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18631286A Pending JPS6342151A (en) | 1986-08-08 | 1986-08-08 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6342151A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9202765B2 (en) | 2013-01-25 | 2015-12-01 | Mitsubishi Electric Corporation | Semiconductor device |
-
1986
- 1986-08-08 JP JP18631286A patent/JPS6342151A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9202765B2 (en) | 2013-01-25 | 2015-12-01 | Mitsubishi Electric Corporation | Semiconductor device |
| US9391006B2 (en) | 2013-01-25 | 2016-07-12 | Mitsubishi Electric Corporation | Semiconductor device and method of manufacturing semiconductor device |
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