JPS6331147A - Lead frame of semiconductor device - Google Patents

Lead frame of semiconductor device

Info

Publication number
JPS6331147A
JPS6331147A JP17504786A JP17504786A JPS6331147A JP S6331147 A JPS6331147 A JP S6331147A JP 17504786 A JP17504786 A JP 17504786A JP 17504786 A JP17504786 A JP 17504786A JP S6331147 A JPS6331147 A JP S6331147A
Authority
JP
Japan
Prior art keywords
lead frame
metal
adhesion
semiconductor device
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17504786A
Other languages
Japanese (ja)
Inventor
Seiichi Nishino
西野 誠一
Tomoichi Oku
倶一 奥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP17504786A priority Critical patent/JPS6331147A/en
Publication of JPS6331147A publication Critical patent/JPS6331147A/en
Pending legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To improve a device in its heat-resistant and moisture-proof features by a method wherein a multiplicity of metal protrusions are provided on the rear surface of a semiconductor element mount. CONSTITUTION:A multiplicity of metal protrusions 5 are formed of such a metal capable of good adhesion with an epoxy-based sealing resin 1 as Cu, Sn-Ni alloy, Ni-P alloy, or aluminum on the rear surface of a mount for a semiconductor element 2. This results in an improved adhesion and in an enlarged area of adhesion. A metal protrusion 5 if produced by partial plating incorporating a resist will be provided with a roughly trapezoidal cross section. A metal protrusion 5 especially of Cu, Sn-Ni, Ni-P or the like may be formed by plating, which process equips the metal protrusion 5 with an excellent adhesion feature as well as an anchoring effect. This method realizes a semiconductor device lead frame 3 excellent in its heatresistant and moisture-proof features.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹脂封止される半導体装置に係シ、特に薄いリ
ードフレームを有する半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device sealed with a resin, and particularly to a semiconductor device having a thin lead frame.

〔従来の技術〕[Conventional technology]

従来、モールド封止型半導体装置に使用されるリードフ
レームは、板厚が0.25乃至0.3 mmのものが使
用されている。しかし力から、カード電卓の様な厚さに
対して敏感なところに使用される半導体装置は、全体の
厚さを薄くする必要から、0.1乃至0.2 mm 厚
のリードフレームが使用されるに致った。
Conventionally, lead frames used in mold-sealed semiconductor devices have a plate thickness of 0.25 to 0.3 mm. However, in semiconductor devices used in places where thickness is sensitive, such as card calculators, lead frames with a thickness of 0.1 to 0.2 mm are used due to the need to reduce the overall thickness. I came to the end.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このようなモールド封止型の半導体装置は、使用される
際に一般にはんだ付けによシ実装される。
When such a mold-sealed semiconductor device is used, it is generally mounted by soldering.

その際に、リードフレームの素子搭載部の裏主面は平坦
であ)、はんだ付けの加熱によ〕、リードフレームの裏
主面と樹脂との界面が剥れるという欠点がある。
At that time, there is a drawback that the back main surface of the element mounting portion of the lead frame is flat, and the interface between the back main surface of the lead frame and the resin peels off due to heating during soldering.

従って、前述した従来のリードフレーム厚が0.25乃
至0.3mmのものけ、リードフレーム、の加工工程に
おいて、エツチング等で多数のくぼみをもうけることに
よ・す、樹脂との接着面積を増加し、密着力の向上を計
っている。しかしながら。
Therefore, in the processing process of the conventional lead frame with a thickness of 0.25 to 0.3 mm, the adhesive area with the resin is increased by creating a large number of depressions by etching etc. The aim is to improve adhesion. however.

薄型に使用される0、 1乃至0.2 mm厚のものけ
Thickness of 0.1 to 0.2 mm used for thin products.

多数のくぼみをもうけると、薄い為搭載部の強度が低下
して平坦度が悪くなシ、良好に素子を搭載出来ないとい
う欠点がある。
If a large number of depressions are formed, the strength of the mounting portion is reduced due to the thinness, resulting in poor flatness and the disadvantage that the device cannot be mounted properly.

本発明の目的は、前記欠点が解決され、耐熱性及び耐湿
性にすぐれた半導体装置のリードフレームを提供するこ
とにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a lead frame for a semiconductor device that solves the above-mentioned drawbacks and has excellent heat resistance and moisture resistance.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の構成は、樹脂封止される半導体装置のリードフ
レームにおいて、半導体素子搭載部の裏主面に多数の金
属突起を設けたことを特徴とする。
The structure of the present invention is characterized in that a large number of metal protrusions are provided on the back main surface of a semiconductor element mounting portion in a lead frame of a semiconductor device that is sealed with resin.

〔実施例〕〔Example〕

次に本発明を図面を参照しながら詳細に説明する。 Next, the present invention will be explained in detail with reference to the drawings.

第1図は本発明の一実施例の半導体装置のリードフレー
ムを示す断面図である。同図において、本実施例の半導
体装置のリードフレーム3#:!:、半導体素子2の搭
載部の裏主面にモールド封止用のエポキシ樹脂からなる
封止樹脂1と比較的密着性の良好な金属、例えばCu+
5n−Ni合金、  Ni −P合金、アルミニウム等
の金属突起5が多数形成されている。これによシ、基本
的密着力の向上と接着面積の増加を計ったものである。
FIG. 1 is a sectional view showing a lead frame of a semiconductor device according to an embodiment of the present invention. In the figure, lead frame 3# of the semiconductor device of this embodiment:! : A metal having relatively good adhesion to the sealing resin 1 made of epoxy resin for mold sealing, such as Cu+, is placed on the back main surface of the mounting portion of the semiconductor element 2.
A large number of metal protrusions 5 made of 5n-Ni alloy, Ni-P alloy, aluminum, etc. are formed. This is intended to improve the basic adhesion force and increase the adhesive area.

この突起5をもける方法として、レジストによう部分め
っき法で行なうと、第2図の様な突起5の形状になる。
When the projection 5 is formed by partial plating using a resist, the shape of the projection 5 as shown in FIG. 2 is obtained.

即ち、断面が略台形状になる。特に、Cu、5n−Ni
That is, the cross section becomes approximately trapezoidal. In particular, Cu, 5n-Ni
.

N1−P等の金属突起は、めっき法で形成出来ることか
ら、密着特性にアンカー効果もあシ、有効である。
Metal protrusions such as N1-P can be formed by plating, and therefore have an effective anchoring effect on adhesion properties.

また、第3図に本発明の他の実施例の半導体装置のリー
ドフレームを示すように、めっき法で突起5の形成の出
来ないアルミニウム等は、事前にクラッド法や蒸着によ
り、全面に形成したのち、エツチング等で突起を形成す
る。この様に行なうと、第3図の様な逆台形状の突起5
′が得られる。
In addition, as shown in FIG. 3, which shows a lead frame of a semiconductor device according to another embodiment of the present invention, aluminum, etc., on which protrusions 5 cannot be formed by plating, are formed on the entire surface by cladding or vapor deposition in advance. Afterwards, protrusions are formed by etching or the like. If you do this, you will see an inverted trapezoidal protrusion 5 as shown in Figure 3.
′ is obtained.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、接着面積の増加
によって密着性が向上するばかシでなく、素材そのもの
の密着特性にとられれることなく、よシ封止樹脂と密着
性の良好な金属を選択出来るという効果が得られる。そ
の他に、特にめっき方法で形成した形状は、アンカー効
果もあることから、リードフレームの素子搭載部裏面と
樹脂との密着性は非常に強固となり、半導体装置におけ
る耐熱性並びに耐湿性が著しく向上するという効果が得
られる。
As explained above, according to the present invention, instead of improving adhesion by increasing the bonding area, it is possible to improve the adhesion with the sealing resin without depending on the adhesion characteristics of the material itself. The effect of being able to select the metal can be obtained. In addition, the shape formed by plating has an anchoring effect, so the adhesion between the back side of the element mounting part of the lead frame and the resin is extremely strong, which significantly improves the heat resistance and moisture resistance of semiconductor devices. This effect can be obtained.

尚第1図において、リードフレーム3の各リードと、半
導体素子2の電極とけ、ボンディング・ワイヤで1気的
に接続されている。
In FIG. 1, each lead of the lead frame 3 and the electrodes of the semiconductor element 2 are integrally connected by bonding wires.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の半導体装置のリードフレー
ムの断面図、第2図は第1図の突起を示す断面図、第3
図は本発明の他の実施例の半導体装置のリードフレーム
の突起を示す断面図である。 同図において、 1・・・・・・封止樹脂、2・・−・・・半導体素子、
3・・・・・・リードフレーム、4・・・・・・ボンデ
ィング・ワイヤ、5゜5′・・・・・・突起。 rへ・、 代理人 弁理士  内 原   1  ・′8、−ノ 表1回 茅2ツ 沼3 ゾ
FIG. 1 is a cross-sectional view of a lead frame of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a cross-sectional view showing the protrusion in FIG. 1, and FIG.
The figure is a sectional view showing a protrusion of a lead frame of a semiconductor device according to another embodiment of the present invention. In the figure, 1... Sealing resin, 2... Semiconductor element,
3...Lead frame, 4...Bonding wire, 5゜5'...Protrusion. To r・、Representative Patent Attorney Uchihara 1 ・'8、-ノTable 1 Kaya 2 Tsunuma 3 zo

Claims (1)

【特許請求の範囲】[Claims]  樹脂封止される半導体装置のリードフレームにおいて
、半導体素子搭載部の裏主面に、多数の金属突起を設け
たことを特徴とする半導体装置のリードフレーム。
A lead frame for a semiconductor device sealed with resin, characterized in that a large number of metal protrusions are provided on the back main surface of a semiconductor element mounting part.
JP17504786A 1986-07-24 1986-07-24 Lead frame of semiconductor device Pending JPS6331147A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17504786A JPS6331147A (en) 1986-07-24 1986-07-24 Lead frame of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17504786A JPS6331147A (en) 1986-07-24 1986-07-24 Lead frame of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6331147A true JPS6331147A (en) 1988-02-09

Family

ID=15989297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17504786A Pending JPS6331147A (en) 1986-07-24 1986-07-24 Lead frame of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6331147A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02205351A (en) * 1989-02-03 1990-08-15 Fujitsu Ltd Resin seal type semiconductor device
JPH06132459A (en) * 1992-10-14 1994-05-13 Shinko Electric Ind Co Ltd Lead frame and manufacture thereof
EP0778618A3 (en) * 1992-12-23 1998-05-13 Shinko Electric Industries Co. Ltd. Lead frame and method for manufacturing it
US8008757B2 (en) * 2006-02-03 2011-08-30 Mitsui Chemicals, Inc. Resinous hollow package and producing method thereof
JP2016219524A (en) * 2015-05-18 2016-12-22 Shマテリアル株式会社 Lead frame for mounting semiconductor element and semiconductor device, and their manufacturing method
JP2019067885A (en) * 2017-09-29 2019-04-25 三菱電機株式会社 Semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02205351A (en) * 1989-02-03 1990-08-15 Fujitsu Ltd Resin seal type semiconductor device
JPH06132459A (en) * 1992-10-14 1994-05-13 Shinko Electric Ind Co Ltd Lead frame and manufacture thereof
EP0778618A3 (en) * 1992-12-23 1998-05-13 Shinko Electric Industries Co. Ltd. Lead frame and method for manufacturing it
US5909053A (en) * 1992-12-23 1999-06-01 Shinko Electric Industries Co. Ltd. Lead frame and method for manufacturing same
US8008757B2 (en) * 2006-02-03 2011-08-30 Mitsui Chemicals, Inc. Resinous hollow package and producing method thereof
JP2016219524A (en) * 2015-05-18 2016-12-22 Shマテリアル株式会社 Lead frame for mounting semiconductor element and semiconductor device, and their manufacturing method
JP2019067885A (en) * 2017-09-29 2019-04-25 三菱電機株式会社 Semiconductor device

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