JPS63310134A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To enhance the integration density of a circuit by a method wherein a circuit device having a structure which functions both as a protective device against the static electricity and an output transistor device is arranged in the neighborhood of a bonding pad. CONSTITUTION:An internal circuit 2 where a first circuit device C0 is arranged is installed on a semiconductor chip 1; second circuit devices C1-Cn having a specific device pattern are arranged in the neighborhood in such a way that these devices correspond to bonding pads P1-Pn as pairs. The specific device pattern for the second circuit devices C1-Cn is set to have two functions by changing a wiring pattern, i.e., a function as a protective device and another function as an output transistor device. Accordingly, even when the bonding pads P1-Pn are used for input use or when they are used for output use, they can function as the second circuit devices C1-Cn. By this setup, the number of circuit devices to be arranged in the circumference of the internal circuit can be reduced substantially, and an integration density of a circuit can be enhanced.

Description

[Detailed Description of the Invention] [Summary] Regarding the layout technology of circuit elements in semiconductor integrated circuit devices, especially semi-custom TC devices, the purpose is to improve the degree of circuit integration and to realize a predetermined logical function. an internal circuit in which a plurality of first circuit elements are arranged in an unwired state on a semiconductor chip, a plurality of bonding pads arranged along the periphery of the internal circuit, and each of the plurality of bonding pads. a second circuit element having a specific element pattern arranged adjacent to the corresponding one, and the specific element pattern indicates that when the bonding pad is connected for input, the second circuit element When the bonding pad is connected for output, the second circuit element is connected to the corresponding first circuit element in the internal circuit so as to constitute a protection element for the corresponding first circuit element in the circuit. The circuit element is configured to form an output transistor element for the circuit element.

[Industrial application field]

The present invention relates to a semiconductor integrated circuit (semiconductor IC) device,
In particular, it relates to layout techniques for circuit elements in semi-custom IC devices (master slice products).

[Conventional technology]

FIG. 5 schematically shows an example of the layout of circuit elements in a semiconductor 1C device as an example of a conventional type.

In the figure, 51 indicates a semiconductor chip, and an internal circuit 52 (indicated by a dashed line) in which circuit elements (not shown) are arranged in an array to realize a predetermined function is provided on the chip. It is being Bonding pads Pi (i=1 to n) are arranged around this internal circuit, and each of the bonding pads is connected to a wire Wi (i=1 to n).
metal wiring Li (i=1
= n).

This bonding pad corresponds to the input/output terminal from the perspective of the chip, so from the viewpoint of protecting the internal circuit 52 when static electricity is superimposed on the input/output terminal, there is a A protection element for static electricity is provided in pairs. This protection element has the symbol Ci' (
i=1 to n). Further, when the bonding pad is used for output, it is necessary to provide an output transistor that amplifies the output signal from the internal circuit to the extent that the output side (metal wiring side) can be driven. In this case,
As shown in FIG. 5, output transistor elements Ti (i=1 to m) are provided at predetermined intervals. Note that 53 is a low potential power line VSS, and 54 is a high potential power line V.
Indicates cc.

[Problem that the invention seeks to solve]

In the conventional semiconductor IC device described above, when an output transistor element is provided, the element requires a large current capacity in terms of its function, so its size is designed to be relatively large. Therefore, from the viewpoint of highly integrated circuits, it is not preferable to mount a large number of them on a chip.

On the other hand, the same applies to protection elements, and although they are essential elements from the perspective of protecting internal circuits, from the perspective of high circuit integration, it is not desirable to mount a large number of them on a chip.

Therefore, if possible, it is desired to substantially reduce the number of protective elements and output transistor elements mounted.

The present invention was created in view of the problems in the prior art described above, and an object of the present invention is to provide a semiconductor IC device that can improve the degree of circuit integration.

[Means for solving problems]

The problem with the conventional technology described above is that a specific circuit element is provided near the bonding pad, and the element pattern of the circuit element is set so that this circuit element can realize two functions by changing the wiring form. It can be solved by

Therefore, according to the present invention, there is provided an internal circuit in which a plurality of first circuit elements for realizing a predetermined logical function are arranged in an unwired state on a semiconductor chip, and an internal circuit along the periphery of the internal circuit. a plurality of arranged bonding pads; and a second circuit element having a specific element pattern arranged adjacent to each of the plurality of bonding pads, the specific element pattern including an acid bonding pad. When connecting for input, the second circuit element constitutes a protection element for the corresponding first circuit element in the internal circuit, and when connecting the bonding pad for output, There is provided a semiconductor IC device, characterized in that the second circuit element is formed so as to constitute an output transistor element with respect to a corresponding first circuit element in the internal circuit.

[For production]

According to the above-described configuration, the specific element pattern of the second circuit element is set so that it can realize two functions, namely, the function as a protection element and the function as an output transistor element, by changing the wiring form. has been done. Therefore, whether the bonding pad is used for input or output, it can also be used as the second circuit element.
The number of circuit elements arranged around the internal circuitry is substantially reduced.

In other words, if the area of the chip is kept constant, the area of the internal circuit will increase relatively. This means that the degree of circuit integration is improved.

〔Example〕

FIG. 1 schematically shows an example of the layout of circuit elements in a half-quad IC device as an embodiment of the present invention.

In FIG. 1, 1 indicates a semiconductor chip, and an internal circuit 2 (indicated by a dashed line) in which circuit elements Co are arranged in an array for realizing a predetermined function is provided on the chip. ing. A high-potential power supply line 4 (voltage Vcc: 5V) is arranged around this internal circuit, and bonding pads Pi (i=1 to n) are arranged around it. Each of these bonding pads has a one-to-one correspondence with a circuit element C1 (
i=1 to n) are arranged adjacent to each other. Further, a low potential power supply line 3 (voltage Vss (GND); OV) is arranged so as to surround the circuit element Ci and the pad Pi. Each bonding pad is connected to a wire Wi(i
=l-n), metal wiring Li(
i-1 to i-n). Therefore, for example, when the bonding pad P is used as a power supply pad, the bonding pad P and the power supply line 4 are connected by AI wiring as shown in the figure. Similarly, when bonding pad P3 is used as a grounding pad, as shown in the figure, the bonding pad and power line 3 are connected to each other. Connected by wiring.

FIG. 2 shows an example of the element pattern of the circuit element Ci shown in FIG. 1.

In the figure, 20 indicates an element formation region (active region), in which an n-type impurity region 21 and a p-type impurity region 22 are formed. An electrode forming the collector C of the transistor is formed in the n-type impurity region 21, and an electrode forming the base B of the transistor and two n-type impurity regions 23A and 23B are formed in the p-type impurity region 22. . Electrodes constituting the emitter E of the transistor are formed in these two n-type impurity regions 23A and 23B, respectively.

Next, the usage pattern of the circuit element Ci with the element pattern set as shown in Fig. 2 will be explained with reference to Figs. 3 (a), (h) and Figs. 4 (a) and (b). do.

Figures 3 (a) and (b) show how the circuit element Ci is used when the bonding pad is used as an input. (a) shows the wiring form at that time, and (b) shows the equivalent circuit. shows. The hatched portion in (a) indicates a wiring pattern such as A1, and indicates an electrically connected state.

According to the usage pattern shown in Figure 3, even if noise such as static electricity is superimposed on the bonding pad Pi via an external pin, the transistor's collector-emitter resistance will be higher than the equivalent series resistance of the internal circuit. is much smaller, so the signal caused by the noise does not flow to the resistor, but flows to ground through the transistor. Therefore, the internal circuitry is protected from this noise.

Figures 4 (a) and (b) show how the circuit element Ci is used when the bonding pad is used for output, where (a) shows the wiring form at that time, and (b) shows the equivalent circuit. .

According to the usage pattern shown in FIG. 4, the output signal from the internal circuit is amplified by the transistor and then output to the external pin via the bonding pad Pi. Also,
Even if noise such as static electricity is input to the bonding pad Pi via an external pin when the transistor is in the off state, the voltage between the collector and emitter of the transistor is high, so the signal caused by this noise will be transmitted to the internal circuit. This can avoid the inconvenient situation where the data is input to

In addition, in the above-described embodiment, a case was explained in which the specific pattern of the circuit element Pi was set as an N P N-type transistor, but as is clear from the gist of the present invention, this does not apply to a PNP-type transistor as a specific pattern. Alternatively, it is also possible to set an arbitrary pattern having a form other than a transistor.

Further, when the circuit element Pi is set in the form of a transistor, it is not limited to a bipolar element as shown in this embodiment, but a unipolar element such as CMO3 can also be set.

〔Effect of the invention〕

As explained above, according to the semiconductor IC device of the present invention,
By arranging a circuit element with a structure that combines the functions of an electrostatic protection element and an output transistor element adjacent to the bonding pad, the number of circuit elements to be arranged around the internal circuit can be substantially reduced. Since the area occupied by the internal circuit can be relatively increased, the degree of integration of the circuit can be improved.

[Brief explanation of drawings]

1 is a schematic plan view showing an example of the layout of circuit elements in a semiconductor IC device as an embodiment of the present invention; FIG. 2 is a diagram showing an example of the element pattern of the circuit element Ci shown in FIG. 1; 3(a) and 3(b) are diagrams showing an example of the use of the circuit element Ct shown in FIG. 1, in which (a) is a wiring diagram, (b) is an equivalent circuit diagram, and FIG. 4(a) and (b) are diagrams showing other usage examples of the circuit element Ci shown in FIG. 1, (a) is a wiring diagram, (b)
is an equivalent circuit diagram, and FIG. 5 is a schematic diagram showing an example of the layout of circuit elements in a semiconductor IC device as an example of a conventional type (explanation of symbols) 1... semiconductor chip, 2... internal circuit, 3...・Power line (Vss), 4...Power line (Vcc)
, Co...(first) circuit element, P1-Pn... bonding pad, C1-Cn...
- (Second) circuit element.

Claims (1)

[Claims] An internal circuit (2) in which a plurality of first circuit elements (Co) for realizing a predetermined logical function are arranged in an unwired state on a semiconductor chip (1); A plurality of bonding pads (P_1 to Pn) arranged along the periphery of the internal circuit, and a second circuit element (C_1) having a specific element pattern and arranged adjacent to each of the plurality of bonding pads. ~Cn), and the specific element pattern is such that when the bonding pad is connected for input, the second circuit element provides a protection element to the corresponding first circuit element in the internal circuit. and when the bonding pad is connected for output, the second circuit element configures an output transistor element with respect to a corresponding first circuit element in the internal circuit. A semiconductor integrated circuit device characterized by: