JPS63310113A - Manufacturing device for semiconductor integrated circuit - Google Patents

Manufacturing device for semiconductor integrated circuit

Info

Publication number
JPS63310113A
JPS63310113A JP14660287A JP14660287A JPS63310113A JP S63310113 A JPS63310113 A JP S63310113A JP 14660287 A JP14660287 A JP 14660287A JP 14660287 A JP14660287 A JP 14660287A JP S63310113 A JPS63310113 A JP S63310113A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
semiconductor wafer
quartz
boat
rear
possible
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14660287A
Inventor
Yasushi Sasaki
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Abstract

PURPOSE: To prevent a scratch from being produced or a dust particle from adhering to the main surface of a semiconductor wafer by installing a quartz boat where two or more semiconductor wafers to be oxidized and diffused inside a horizontal-type diffusion furnace are piled up horizontally with intervals and are processed.
CONSTITUTION: Two or more pairs of quartz sheets 5 are installed on a quart; mother boat 3 where two or more pairs of rollers 4 are installedy a number of wafer-mounting parts 6 are formed at the quartz sheets 5; a front part 9 of the quartz boat is directed toward a horizontal-type diffusion furnace 11 and is inserted into the furnace by pushing a rear part 10 of the quartz boat. During this operation, a semiconductor wafer is mounted in such a way that the surface 1 of the semiconductor wafer faces upward and that its rear 2 faces downward. By this setup, it is possible to limit a contact part 8 between the semiconductor wafer and the quartz boat to the rear 2 of the semiconductor wafer; it is possible to reduce the friction; accordingly, it is made possible to prevent a scratch from being produced locally and a dust particle from adhering locally to the surface.
COPYRIGHT: (C)1988,JPO&Japio
JP14660287A 1987-06-11 1987-06-11 Manufacturing device for semiconductor integrated circuit Granted JPS63310113A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14660287A JPS63310113A (en) 1987-06-11 1987-06-11 Manufacturing device for semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14660287A JPS63310113A (en) 1987-06-11 1987-06-11 Manufacturing device for semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS63310113A true true JPS63310113A (en) 1988-12-19

Family

ID=15411436

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14660287A Granted JPS63310113A (en) 1987-06-11 1987-06-11 Manufacturing device for semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS63310113A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04315557A (en) * 1990-08-31 1992-11-06 American Teleph & Telegr Co <Att> Device and method for positioning pattern analyzing device in panel manufacturing process
FR2950195A1 (en) * 2009-07-21 2011-03-18 Semco Engineering Sa Silicon plate support for heat treating furnace to manufacture photovoltaic cell, has housings receiving respective plates to treat and maintain plates in horizontal position, where housings horizontally extend between openings of basket
WO2012127123A1 (en) * 2011-03-18 2012-09-27 Semco Engineering Sa Holder for silicon wafers, and method for treating said wafers
US8303712B2 (en) 2008-01-31 2012-11-06 Hitachi Kokusai Electric Inc. Substrate processing apparatus, method for manufacturing semiconductor device, and process tube

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04315557A (en) * 1990-08-31 1992-11-06 American Teleph & Telegr Co <Att> Device and method for positioning pattern analyzing device in panel manufacturing process
US8303712B2 (en) 2008-01-31 2012-11-06 Hitachi Kokusai Electric Inc. Substrate processing apparatus, method for manufacturing semiconductor device, and process tube
FR2950195A1 (en) * 2009-07-21 2011-03-18 Semco Engineering Sa Silicon plate support for heat treating furnace to manufacture photovoltaic cell, has housings receiving respective plates to treat and maintain plates in horizontal position, where housings horizontally extend between openings of basket
WO2012127123A1 (en) * 2011-03-18 2012-09-27 Semco Engineering Sa Holder for silicon wafers, and method for treating said wafers

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