JPS63308644A - Interruption processing control system - Google Patents

Interruption processing control system

Info

Publication number
JPS63308644A
JPS63308644A JP62144255A JP14425587A JPS63308644A JP S63308644 A JPS63308644 A JP S63308644A JP 62144255 A JP62144255 A JP 62144255A JP 14425587 A JP14425587 A JP 14425587A JP S63308644 A JPS63308644 A JP S63308644A
Authority
JP
Japan
Prior art keywords
host
dat
interruption
processing
guest
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62144255A
Other versions
JPH0754472B2 (en
Inventor
Gakuo Asakawa
Aiichiro Inoue
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62144255A priority Critical patent/JPH0754472B2/en
Publication of JPS63308644A publication Critical patent/JPS63308644A/en
Publication of JPH0754472B2 publication Critical patent/JPH0754472B2/en
Anticipated expiration legal-status Critical
Application status is Expired - Fee Related legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system

Abstract

PURPOSE:To execute a high speed host interruption processing by providing a holding means to combine a new program with the exceptional contents of a host CAT at the time of a guest interruption processing in a virtual computer to execute duplicate address transformation (DAT). CONSTITUTION:In a DAT where the actual address of a guest corresponds to the virtual address of a host, when the exception of a host DAT is detected during a guest interrupting processing, the state is immediately transitted to a host interruption by a state transition means 1. Then, a holding means 22 to combine the new program with the exceptional contents provided in a virtual computer is referred and the host interruption is executed by a processing means 3. Thus, the high speed host program interruption processing for the host DAT is executed without an emulation by a firmware.
JP62144255A 1987-06-10 1987-06-10 Interrupt processing control system Expired - Fee Related JPH0754472B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62144255A JPH0754472B2 (en) 1987-06-10 1987-06-10 Interrupt processing control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62144255A JPH0754472B2 (en) 1987-06-10 1987-06-10 Interrupt processing control system

Publications (2)

Publication Number Publication Date
JPS63308644A true JPS63308644A (en) 1988-12-16
JPH0754472B2 JPH0754472B2 (en) 1995-06-07

Family

ID=15357846

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62144255A Expired - Fee Related JPH0754472B2 (en) 1987-06-10 1987-06-10 Interrupt processing control system

Country Status (1)

Country Link
JP (1) JPH0754472B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011513808A (en) * 2008-02-26 2011-04-28 インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Dynamic address translation using translation exception modifiers

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61251936A (en) * 1985-05-01 1986-11-08 Fujitsu Ltd Virtual computer system
JPS63147235A (en) * 1986-12-10 1988-06-20 Nec Corp Information processor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61251936A (en) * 1985-05-01 1986-11-08 Fujitsu Ltd Virtual computer system
JPS63147235A (en) * 1986-12-10 1988-06-20 Nec Corp Information processor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011513808A (en) * 2008-02-26 2011-04-28 インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Dynamic address translation using translation exception modifiers
US8683176B2 (en) 2008-02-26 2014-03-25 International Business Machines Corporation Dynamic address translation with translation exception qualifier
US9092351B2 (en) 2008-02-26 2015-07-28 International Business Machines Corporation Creating a dynamic address translation with translation exception qualifier
US10078585B2 (en) 2008-02-26 2018-09-18 International Business Machines Corporation Creating a dynamic address translation with translation exception qualifiers
US10241910B2 (en) 2008-02-26 2019-03-26 International Business Machines Corporation Creating a dynamic address translation with translation exception qualifiers

Also Published As

Publication number Publication date
JPH0754472B2 (en) 1995-06-07

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees