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JPS63284684A - Picture processor - Google Patents

Picture processor

Info

Publication number
JPS63284684A
JPS63284684A JP11943787A JP11943787A JPS63284684A JP S63284684 A JPS63284684 A JP S63284684A JP 11943787 A JP11943787 A JP 11943787A JP 11943787 A JP11943787 A JP 11943787A JP S63284684 A JPS63284684 A JP S63284684A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
clock
frequency
circuit
number
reduction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11943787A
Inventor
Toshiyuki Kawahara
Toshiyuki Koda
Taiji Shimeki
Toshiichi Tatsumi
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Abstract

PURPOSE: To obtain a device of simple constitution by generating a clock whose frequency is K-number of times as high as that of a reference clock and thinning M-number of pulses of this generated clock to drop out (M-N)-number of pulses in accordance with a reduction factor N/M and dividing the frequency by 1/K to obtain a sampling clock.
CONSTITUTION: A clock CK2 which is four (frequency division ratio) times as high as a reference clock CK1 is outputted from a clock generating circuit 102. This clock CK2 is divided by 1/3 in a first frequency dividing circuit 103 based on reduction factor N/M=2/3 set by the reduction factor set register 100. One pulse is dropped out from the clock CK2 by a gate circuit 104 to generate a clock CK3. The clock CK3 is divided again by 1/4 in a second frequency dividing circuit 105 to generate a sampling clock CK4. A/D-converted picture data is written in a buffer memory 107 by the sampling clock CK4 to obtain picture data which is reduced to 2/3 in the horizontal direction.
COPYRIGHT: (C)1988,JPO&Japio
JP11943787A 1987-05-15 1987-05-15 Picture processor Pending JPS63284684A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11943787A JPS63284684A (en) 1987-05-15 1987-05-15 Picture processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11943787A JPS63284684A (en) 1987-05-15 1987-05-15 Picture processor

Publications (1)

Publication Number Publication Date
JPS63284684A true true JPS63284684A (en) 1988-11-21

Family

ID=14761397

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11943787A Pending JPS63284684A (en) 1987-05-15 1987-05-15 Picture processor

Country Status (1)

Country Link
JP (1) JPS63284684A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5383208A (en) * 1992-07-30 1995-01-17 France Telecom Device and method to control the output power of laser diodes

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5383208A (en) * 1992-07-30 1995-01-17 France Telecom Device and method to control the output power of laser diodes

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