JPS63262723A - Arithmetic processing method - Google Patents

Abstract

PURPOSE:To improve the operation speed by executing arithmetical operations by a data of a floating point format with respect to the number of bits of an input data, and executing the processing when its effective digit number becomes smaller than the effective digit number of the input data. CONSTITUTION:Data in input registers 2, 3 are calculated by a floating point arithmetical operation circuit 4 and its result is stored in a register 5, a prescribed bit portion of its output data is inputted to an AND circuit 6 and a NOR circuit 7, and its output is inputted to a normalization request flag register 9 through an OR circuit 8. Also, its output is inputted to AND circuits 11, 13, and a signal of a normalization permitting flag register 10 is inputted to the circuit 13 through the circuit 11 and a NOT circuit 12. In such a way, at the time of setting the register 10, the normalization processing is executed automatically, and at the time of resetting it, an interruption processing signal for urging the normalization processing is generated.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to arithmetic processing that improves arithmetic accuracy by preventing the number of significant digits of calculation data from becoming less than the number of significant digits of input data in a floating point arithmetic process. It is about the method.

Conventional technology In conventional floating-point arithmetic processing methods, one operation is performed on input data, and the operation data is normalized each time the operation is completed to prevent the number of significant digits indicating the precision of the data from becoming small. Or, even if the accuracy of the data decreases due to calculation, the data is not changed by calculation processing. 1. The way the data is held is changed by the user's program etc. Or, the data accuracy is changed. It ignored it and started executing the next operation.

Problems to be Solved by the Invention: Normalizing data every time an operation is completed poses a fatal problem in that the operation speed decreases. Furthermore, if data is not normalized, the accuracy of the data decreases, which is a fatal problem.

For example, specifically input data as below A, B and C.
We will explain the problems when subtracting the three data.

As for the data format, the exponent part is ・℃ bit and the mantissa part is 1.
It is assumed that both data are 0-bit data and are expressed in two's complement.

A=0111000000X2010000B=011
0000000X2010.000C=0101011
Executing 100x2'' 00D=A-B results in the following data.

D=0001000000x2010000 Then E=
When executing D-C, digit alignment is performed on the data in C to align the digits of the exponent part, and if this data is set as C1, CI=OOOOOO10101X2""", and E=D
When −C is calculated, E=OOOO101011X2010000. On the other hand, if we normalize the value of D obtained by executing 8-B and let this value be , then DI = 010000000
It becomes 0X2001110. In order to perform the calculation E+=D+C, we perform the digit alignment on the data of C and set it as C2, which becomes C2=OO01010111X2"th 10.Moreover, when we execute E,=D,-C2, E+=OO10
101001X2' becomes old 0. E and E! Perform normalization for 1. The values are E (positive) and E+ (positive)
Then, E (correct) =0101011000X2G
O mouth OIE+ (positive) =0101010010X200
It becomes +101, and it can be seen that the values of E (positive) and E+ (positive) are different. This is because even though the effective digits of the data decreased when the operation A-B was executed, the digits of the data C were aligned in order to perform the next operation D-C without normalizing the data D. Because the calculation was executed, the number of effective digits in the data of C which was digit-aligned was insufficient (this is because the value of E in the value of calculation D-C is no longer accurate).

Also, without holding data like this, input data A
, B and C, internal data A3゜B and C1
For example, in order to increase the precision of
If the calculations -B, ,E,=D, -Ca are performed without normalization, the values of the internal data Aa, B, and C3 and the values of the calculation results D3 and E are as follows.

A a = 0111000000000000 X
20G010000B a =ouooooooooo
oooo X 200016000CI =01010
11100000000 x 20000+ 100D
2 = 0001000000000000 X 2
00010000E * = 00001010100
10000 x 2 'Go 1000G Next, if we perform normalization in each step of this calculation and calculate it, we can obtain it by calculating A, -B, and the value of D and I normalized to the value of is Da+ = 0100000000000000 X 2
“00””, aligning CQ with D a I and Ca
2, C12= 000101011100000
0 x 2 ""th IO. Mo and Eal=I)a
When calculating l Ca2, Ea+ =0010101
001000000X 20000”10 ElI
Normalize and Eat, and let the values be Ea (positive) and E-+ (positive), then E, (positive) = OIO1
010010000000x 200"'"IEa+
(Correct)=0101010010000000x 20
00'1101, and in this case, E, which was not normalized during the calculation process, (positive) value, and E9+, which was normalized.
(positive) values are equal, and E, (positive) values are correctly stored. In this case, the precision of the operation is guaranteed by having 6 bits more in the mantissa part of the internal data than the number of bits in the mantissa part of the input data, but the result of the operation of D, -C, Looking at E3, we can see that the significant digits of the mantissa have dropped by 3 bits. By having internal data in this data format, there is a margin of 6 bits for the accuracy of the input data, but if this data E is used to perform the next numerical operation, the accuracy of the input data cannot be guaranteed.

As shown above, if an operation is performed without normalization, it may give an incorrect value, or if an internal data format with a bit number greater than the number of bits of the input data is used, if it is not normalized, the result will be There was a problem where the number of significant digits was insufficient, causing incorrect values to be displayed.

Means for Solving the Problems The arithmetic processing method of the present invention performs four arithmetic operations using floating point format data in which the number of bits of the operation data used in the operation is greater than the number of bits of the input data. If the number of valid digits of the calculation data is less than the number of valid digits of the input data, the calculation data is automatically normalized or an interrupt process is performed to prompt the calculation system to perform the normalization process. It is.

According to the arithmetic processing method of the present invention, the normalization process is performed only when the number of significant digits of the arithmetic data is less than the number of significant digits of the input data, so the arithmetic operation can be executed at high speed. Calculations can be performed without compromising accuracy.

Embodiment An embodiment of the arithmetic processing method of the present invention will be described with reference to the block diagram shown in FIG.

Input data 1 having a data format of 6 bits in the exponent part and 10 bits in the mantissa part is converted into internal data in a data format of 8 bits in the exponent part and 16 bits in the mantissa part, and is stored in input registers 2 and 3. Note that all data are expressed in two's complement numbers.

Next, the data stored in the input registers 2 and 3 is taken out, and the floating point arithmetic operation circuit 4 performs an operation, and the resulting data is stored in the operation result storage register 5. Then, the upper 6 bits of the output data of the operation result storage register 5 are
input to the ND circuit 6 and NOR circuit 7, and these AN
The outputs of the D circuit 6 and the NOR circuit 7 are input to the OR circuit 8. The output of this OR circuit 8 is input to the normalization request flag register 9, and the outputs of the normalization permission flag register 10 and the normalization request flag register 9, which determine whether or not to automatically execute normalization processing, are input to the AND circuit 9. Create a control signal to input and execute the normalization process. On the other hand, NO creates an inverted signal of the signal of the normalization permission flag register 10.
The output of the T circuit 12 and the output of the normalization request flag register 9 are input to an AND circuit 13, and an interrupt signal for normalization processing is generated for the system.

When the upper six bits of the output data of the operation result storage register 5 are all O or all 1, an output signal appears in the OR circuit 8, and the normalization request flag register 9 is set to 7' by this output signal. Since the upper 6 bits of the output data at this time are sign bits, the data accuracy is reduced to 11 bits, but the 10 bits of data accuracy at the time of input is guaranteed.

Whether or not normalization is performed automatically here is determined by the set or reset state of the normalization permission flag register 10. Here, the setting or reset state of the normalization permission flag register 10 can be selected by the user program. Normalization permission flag register 10
Automatically performs normalization processing only when is set. When the normalization permission flag register 10 is reset, no processing is performed on the output data, or an interrupt processing signal is generated to prompt the arithmetic system to perform normalization processing.

In this way, by using the internal data that has an extra bit length of 6 bits compared to the input data and the arithmetic processing method of the present invention, it is possible to perform five operations in an operation where one significant digit is lost in one numerical operation. It can be executed without normalization processing. Also, when performing normalization, the mantissa part is shifted 5 bits to the left, and the exponent part is increased or decreased by 5 digits (there is no need for processing to detect the amount of shift, etc.). Therefore, output data can be normalized at high speed, and the accuracy of calculations is not degraded.

In addition, in this example, the way of holding data is as follows: 0.5≦1 mantissa part 1<1 0≦1 exponent part 1<128 By using the following expressions, the mantissa part of the output data of the four arithmetic operations can be changed! An operation in which input data mantissa part 1>1 output data mantissa part 1 is described.

In order to support operations where 1 person data mantissa part 1 < 1 output data mantissa part 1, the bit length is also extended to the most significant bit (MSB) in the internal data format. Similar processing can be achieved by doing so.

Note that by increasing the number of bits in the internal data format, the number of times the normalization process is performed can be reduced, and it is also possible to speed up the calculation.

Effects of the Invention According to the arithmetic processing method of the present invention, normalization processing is performed only when the number of significant digits of the arithmetic data is less than the number of significant digits of the input data. , it is possible to perform calculations without compromising calculation accuracy and has great economical effects.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the arithmetic processing method of the present invention. 1... Input data, 2, 3... Input register, 4... Floating point four arithmetic circuit, 5.
...Arithmetic result storage register, 6, 11.13...
...AND circuit, 7...NOR circuit, 8.
. . . OR circuit, 9 . . . Normalization request flag register, 10 . . . Normalization permission flag register, 12 . . . NOT circuit. Name of agent Patent attorney Toshio Nakao and 1 other person 5

Claims (1)

[Claims] Four arithmetic operations are performed using floating point format data in which the number of bits of the calculation data used in the calculation is greater than the number of bits of the input data, and during the calculation process, the number of significant digits of the calculation data is greater than the number of significant digits of the input data. 1. An arithmetic processing method characterized by automatically normalizing the arithmetic data or performing an interrupt process to prompt the arithmetic system to perform the normalization process when the number of arithmetic data decreases.