JPS63234624A - Switch self-hold control circuit - Google Patents

Switch self-hold control circuit

Info

Publication number
JPS63234624A
JPS63234624A JP6581787A JP6581787A JPS63234624A JP S63234624 A JPS63234624 A JP S63234624A JP 6581787 A JP6581787 A JP 6581787A JP 6581787 A JP6581787 A JP 6581787A JP S63234624 A JPS63234624 A JP S63234624A
Authority
JP
Japan
Prior art keywords
power supply
flip
control circuit
power
hold control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6581787A
Other languages
Japanese (ja)
Other versions
JPH0481893B2 (en
Inventor
Matsuo Yomogida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tohoku Ricoh Co Ltd
Original Assignee
Tohoku Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tohoku Ricoh Co Ltd filed Critical Tohoku Ricoh Co Ltd
Priority to JP6581787A priority Critical patent/JPH0481893B2/ja
Publication of JPS63234624A publication Critical patent/JPS63234624A/en
Publication of JPH0481893B2 publication Critical patent/JPH0481893B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE: To attain low power consumption by disconnecting the power supply to a switch self-hold control circuit when the power supply to the system is disconnected.
CONSTITUTION: In stopping the power supply to the system, a switch 4 is depressed to throw a moving contact (c) to the position of normally opened contact. When the output Q of a flip-flop 5 goes to a high level, the output Q of the flip-flop 6 is inverted from a high to a low level in response to the leading and then a transistor(TR) 9 is turned off. As a result, a switching TR 3 is turned off and the power supply to the system is stopped. The power supplied to the flip-flops 5, 6 through a power line 13 is disconnected at the same time. Thus, the power saving is attained.
COPYRIGHT: (C)1988,JPO&Japio
JP6581787A 1987-03-23 1987-03-23 Expired - Lifetime JPH0481893B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6581787A JPH0481893B2 (en) 1987-03-23 1987-03-23

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6581787A JPH0481893B2 (en) 1987-03-23 1987-03-23

Publications (2)

Publication Number Publication Date
JPS63234624A true JPS63234624A (en) 1988-09-29
JPH0481893B2 JPH0481893B2 (en) 1992-12-25

Family

ID=13297956

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6581787A Expired - Lifetime JPH0481893B2 (en) 1987-03-23 1987-03-23

Country Status (1)

Country Link
JP (1) JPH0481893B2 (en)

Also Published As

Publication number Publication date
JPH0481893B2 (en) 1992-12-25

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