JPS6323421A - Digitized numerical data output device - Google Patents

Abstract

PURPOSE:To prevent the flickering of a display value on a display device by providing a random, pulse excluding device and a synchronizing output device. CONSTITUTION:A count comparator 16 compares the count of an input counter 10 and that of an output counter 14 and gives its difference signal to a random pulse excluding device 18. The difference signal is given to a difference signal integration device 22, where the signal is integrated and the integrated value is inputted to reference value comparators 28, 30, compared with a preset reference value. When the integrated value exceeds a reference value, the count signal is outputted. Thus, when a pulse is inputted at random, it is averaged by the difference signal integration device 22 and so long as it exceeds the reference value, no count signal is outputted, then the numerical data outputted by the output counter 14 is varied frequently and the flickering of the display value of the digital display device 12 is prevented. On the other hand, the synchronizing output device 20 outputs the count signal from the random pulse excluding device 18 synchronously with the timing signal outputted from the timing signal generator 32.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a digitized numerical data output device, and particularly to a digitized numerical data output device that inputs a pulse signal and outputs numerical data to a display and external equipment. be.

[Prior Art] In recent years, instead of analog display or processing methods for numerical data, methods for digitizing and displaying or processing numerical data have become widespread due to their ease and accuracy in reading and processing.

For example, among measuring instruments such as calipers, micrometers, and hide gauges, there are known digital display types that electrically display measured values in digital form instead of the conventional six mechanical reading systems.

Typically, this type of digital display type measuring device includes a movable body movably installed in the main body of the device, and an encoder that detects the amount of movement of the movable body and converts and outputs electrical signal pulses, and the output of the encoder is The electrical signal pulses generated are counted by a counting circuit, and the counted value is digitally displayed on a digital display.

However, if the signal pulse count results are simply displayed digitally immediately in this way, the displayed values will frequently fluctuate due to vibrations of the measuring device or the object to be measured.

In particular, when the measurement resolution of the measuring device is set to 1 μ or less, the displayed value appears as flickering, making it difficult to read.

For this reason, various improvements have been made in the past.

For example, Japanese Patent Laid-Open No. 60-62440 discloses a device that eliminates the unreadability of an NC device due to high-speed pulses generated due to mechanical vibration of the device, and also prevents flickering of displayed values on a digital display. This is considered to be applicable.

This conventional device includes a counter means, a comparison means, and a pulse generation means, and counts pulses from the length measuring device up and down in real time by the counter means. Then, this count value is compared with a reference value in the comparing means, and depending on the comparison result, one up or down counting pulse is generated from the pulse generating means with a time interval equal to or longer than the minimum signal reading time interval of the NC device. Output to NC device. Further, this counting pulse is fed back to the counter means to cancel one count value of the first stage of the counter.

By performing the above operations until the count value of the counter means matches the reference value in the comparison means, the NC device can always respond to high-speed counting pulses.

Therefore, even when the conventional device is connected to a digital display, flickering of the displayed value can be prevented by setting the pulse generation time interval of the pulse generation means to be long.

[Problems to be Solved by the Invention] Problems with the Prior Art: Although it is possible to eliminate some of the randomly input pulses even in the conventional device, when the pulses are generated from the pulse generating means, the count value of the counter means is If the value differs from the reference value in the comparing means, one up or down counting pulse will be output. Therefore, in some cases, the displayed value on the digital display may vary depending on the pulse generation period of the pulse generation means.

This problem is particularly noticeable in digitized numerical data output devices that display counted values on a digital display and also output the counted values to external equipment such as an NC device.

That is, for example, if the pulse generation period of the pulse generating means is determined in accordance with the pulse readable speed of the NCH device, the displayed value on the digital display will also flicker at the pulse readable speed of the NC device. .

Of course, if the pulse generation period of the pulse generation means is made long enough to prevent the displayed value from flickering on the digital display, the followability of the NC device will deteriorate.
It is not legible.

Therefore, it is virtually impossible for the conventional device to supply its output to a digital display and also to an NC device.

The present invention has been made in view of the problems of the prior art described above, and its purpose is to prevent flickering of displayed values while maintaining good pulse followability of external equipment such as an NC device. The purpose of the present invention is to provide a digitized numerical data output device that can output digitized numerical data.

[Means for Solving the Problems] In order to achieve the above object, the device according to the present invention includes an input counter that counts input pulses, an output counter that outputs numerical data to a digital display, and It has a count value comparator that compares the count values of the input counter and the output counter and outputs a difference value signal.

And a random pulse elimination mechanism, a synchronous output mechanism,
It is characterized by having a reset mechanism.

Here, the random pulse elimination mechanism includes a difference signal integrator that integrates the difference signal output from the count value comparator, and an integral value output from the difference signal integrator and a preset standard. It has a reference value comparator that compares the integrated value with the reference value, and outputs a count signal when the integrated value exceeds the reference value.

Further, the synchronous output mechanism includes a timing signal generator that outputs a timing signal at predetermined time intervals, and outputs the count signal from the random pulse elimination mechanism in synchronization with the timing signal.

Furthermore, the reset mechanism resets the difference value signal integrator when a count signal is output by the random pulse elimination mechanism or when the count value of the output counter and the count value of the input counter match.

[Operation] Since the present invention has the above-described configuration, first, the input pulses are counted by the input counter, and this count value is output to the count value comparator.

Further, the output counter outputs numerical data to the digital display and also outputs numerical data to the count value comparator.

The count value comparator compares the count values of the input counter and output counter and outputs a difference signal.

The difference signal from the 1.1 numerical comparator is output to a random pulse rejection mechanism.

In other words, in the random pulse elimination mechanism, the difference value signal output from the count value comparator is input to the difference value signal integrator and integrated. The integral value is input to a reference value comparator and compared with a preset reference value.

Then, when the integrated value exceeds the reference value, it becomes possible to output a count signal.

Therefore, when pulses are randomly input, they are averaged by the difference signal integrator, and the count signal is not output unless the result exceeds the reference value, so the numerical data output by the output counter is frequently This makes it possible to prevent the displayed value on the digital display from flickering.

- On the other hand, the synchronous output mechanism outputs the count signal from the random pulse elimination mechanism in synchronization with the timing signal output from the timing signal generator.

Therefore, even if pulses in a certain direction are input densely, such as when the moving body of the measuring device moves at high speed, the external equipment such as the NC device will not be unable to read the data.

The reset mechanism resets the difference signal integrator of the random pulse elimination mechanism when a count signal is output from the random pulse elimination mechanism, or when the count value of the output counter and the count value of the input counter match, and A new integration of the difference value signal is started.

Therefore, the count value of the output counter will not be changed redundantly.

[Embodiments] Hereinafter, preferred embodiments of the present invention will be described based on the drawings.

FIG. 1 shows a preferred embodiment of the digitized numerical data output device according to the present invention.

As is clear from the figure, the digitized numerical data output device according to the present embodiment includes a reversible counter 10 as an input counter that counts input pulses, and a reversible counter 10 as an output counter that outputs its own data to the digital display 12. It has a reversible counter 14 and a count value comparator 16 which inputs the respective counts of the counters 10 and 14, compares them, and outputs a difference value signal.

The present invention is characterized by a random pulse eliminator groove 18 that can output a count signal when the integral value of the difference signal of the count value comparator 16 exceeds a reference value, and a random pulse eliminater groove 18 that can output a count signal, and the count signal is output for a predetermined period of time. Synchronous output mechanism 20 that outputs at intervals
It is possible to have .

Here, the random pulse elimination mechanism 18 includes a binary signal integrator 22 that integrates the difference signal output from the count value comparator 16, and an integral value output from the difference signal integrator 22 and a reference value setting. It has a reference value comparator 28.30 that compares the reference value with a preset reference value in the device 24.26.

Then, a positive value S1 is set in the reference value setter 24,
The maximum reference value of the integral value of the difference value signal is output to the reference value comparator 28.

Further, a negative value S2 is set in the reference value setter 26, and the minimum reference value of the integral value of the difference value signal is output to the reference value comparator 30.

The outputs of the reference value comparators 28 and 30 are respectively inputted to the UP terminal and DOWNOE terminal of the NC device 100 and the output reversible counter 14 via the synchronous output mechanism 20.

Here, the synchronous output mechanism 20 performs counting from the reference value comparators 28 and 30 in synchronization with the timing signals from the oscillator (O20) 32 and the ○5C32, which constitute a timing signal generator that outputs timing signals at predetermined time intervals. It includes synchronization circuits 34 and 36 that output signals. Then, the output of the reference value comparator 28 is outputted via the synchronization circuit 34, and the output of the reference value comparator 30 is outputted via the synchronization circuit 36.

Furthermore, the outputs of the synchronization circuits 34 and 36 are reset II I
The output of the count value comparator 16 is also input to the OR circuit 40 constituting M, and the output of the count value comparator 16 is also input to the OR circuit 40 that constitutes O, which determines that the difference value signal is O.
The signal is input to the OR circuit 40 via the value judgment circuit 42. The output of the OR circuit 40 is input to the reset terminal of the difference value integrator No. 11 22.

The digitized numerical data output device according to this embodiment is constructed as described above, and its operation will be explained next with reference to FIG. 2.

First, each UP or DOWN pulse signal is input to the reversible input counter 10, and an UPDOWN count is performed.

The count value by this counter 10 is output to a count value comparator 16.

Further, the output reversible counter 14 is set to, for example, O in the initial state, and displays a zero value on the digital display 12, and outputs the counted value O to the counted value comparator 16.

Initially, when the moving object moves at high speed with respect to the measuring instrument main body and UP pulses are inputted densely to the reversible input counter 10,
The difference value G;L from the output reversible counter 14 becomes extremely large, and the output of the difference signal integrator 22 that integrates the output from the count value comparator 16 suddenly increases as shown by the beque in △) in Figure 2. The peak value increases and the peak value is set by the reference value setter 2.
exceeds the maximum reference value S1 set in 4. Therefore, the reference value comparator 28 is in a state where it can output a count signal, but the count signal is 08C32 as shown in FIG. 2(B).
It will be output in synchronization with the timing signal output of. As a result, the count signal from the reference value comparator 28 is outputted via the synchronization circuit 34 as shown by the pulse ■ in FIG. 2(C).

Then, the output pulse from the synchronization circuit 34 is sent to the NC device 10.
0 and the UP terminal of the output reversible counter 14, and the output reversible counter 14 outputs and displays the counted value, which has been incremented by one, to the digital display 12, and is also input to the counted value comparator 16. The output of the counter 14 also increases by one count.

At the same time, the output pulse of the synchronization circuit 34 is also applied to the reset terminal of the difference signal integrator 22 via the OR circuit 40, and the integrated value of the integrator 22 is reset to O.

The integral value increase rate of the difference value signal integrator 22 decreases as the difference value between the count values of the input reversible counter 10 and the output reversible counter 14 becomes smaller, and maintains O when the two match. I come to do it.

By the way, when the relative movement of the movable body with respect to the measuring machine body stops, pulses should not be input to the reversible input counter 10, but for example, due to vibrations of the measuring object or the measuring machine itself, the counter 10 is turned up. Random pulses may be input to the terminal or the DOWN terminal.

As a result, the output of the difference signal integrator 22 is as shown in FIG.
beak IV or V, but both are the maximum reference value 31 set by the reference value setter 24.26.
．． The minimum reference value S2 is not reached and the reference value comparator 28.3
0 does not result in a state in which a count signal can be output.

Therefore, a count signal is not output from the synchronization circuit 34 based on the timing signal of 03C32,
The output reversible counter 14 does not perform any counting;
The displayed value on the digital display 12 does not flicker.

Note that the O value determination circuit 42 determines that the output of the count value comparator 16 is O.
Since a reset signal is output to the difference value signal integrator 22 via the OR circuit 40 every time , it is possible to prevent malfunctions caused by continuous input of random pulses.

As explained above, according to the digitized numerical data output device according to the present embodiment, it is possible to eliminate random pulses and prevent flickering of displayed values on the display while maintaining the pulse tracking performance of the NG device. Can be done.

Note that by changing the set values of the reference value setters 24 and 26, the followability to high-speed pulses and the rejection rate of random pulses can be arbitrarily changed.

Further, it is preferable that the timing signal output time interval of 03C32 can be arbitrarily set according to the pulse reading performance of the connected external device.

[Effects of the Invention] As explained above, according to the present invention, since the random pulse elimination mechanism and the synchronous output mechanism are provided, random pulses can be eliminated without deteriorating the pulse reading performance of external equipment. This makes it possible to prevent flickering of displayed values on the display.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of a preferred embodiment of the digitized numerical data output device according to the first invention of the present application, and FIG. 2 is an explanatory diagram of the operation of the device shown in FIG. 1. 10... Reversible counter for input 12... Digital display 14... Reversible counter for output 16... Count value comparator 18... Random pulse exclusion mechanism 20...
Synchronous output mechanism 22... Difference signal integrator 28.30... Reference value comparator 32... Oscillator (timing signal generator) 40
... OR circuit (reset mechanism).

Claims (3)

[Claims] (1) An input counter that counts input pulses, an output counter that outputs numerical data to a digital display, and a count value that compares the count values of the input counter and output counter and outputs a difference signal. a comparator, a difference signal integrator that integrates the difference signal output from the count value comparator, and a standard for comparing the integral value output from the difference signal integrator with a preset reference value. a value comparator, a random pulse elimination mechanism capable of outputting a count signal when the integrated value exceeds a reference value, and a timing signal generator configured to output a timing signal at predetermined time intervals; a synchronous output mechanism that outputs a count signal of a random pulse elimination mechanism in synchronization with the timing signal; and a count signal is output by the random pulse elimination mechanism, or a count value of an output counter and a count value of an input counter match. a reset mechanism that resets the difference signal integrator when the difference value signal integrator is reset, and outputs a synchronized count signal from the synchronization output mechanism to the output counter and an external device. Device. (2) A digitized numerical data output device according to claim (1), wherein the input counter and the output counter are formed from reversible counters. (3) In the device according to claim (2), the reference value comparator of the random pulse elimination mechanism includes a maximum reference value comparator that compares the maximum reference value and the integral value, and a maximum reference value comparator that compares the maximum reference value and the integral value. A digitized numerical data output device characterized by having a minimum reference value comparator for comparing.