JPS6322613B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and in particular, to a method for manufacturing a semiconductor device, in particular, in isolation using an insulator for isolation between elements of a semiconductor integrated circuit, a sub-isolation region and a region in which a semiconductor substrate is brought to the lowest potential. Concerning the method of forming.

Conventionally, methods for separating elements in semiconductor integrated circuits include junction isolation using a junction region between P-type and N-type or isolation using an insulator. Of these, isolation using an insulator can reduce the spacing between elements. There are advantages. However, when this isolation method using an insulator is applied to a bipolar transistor having a semiconductor substrate of one conductivity type, a buried region of the opposite conductivity type, and a semiconductor silicon epitaxial layer of the same conductivity type as the buried region, As shown in FIG. 1, the manufacturing method is to selectively oxidize a semiconductor epitaxial layer 103 on a semiconductor substrate 101 using a silicon nitride film 104 as a mask to form a thick silicon oxide film, and then to etch the oxide film. A common method is to oxidize the silicon oxide film 107 to reach the semiconductor substrate 101. At this time, 106 in FIG. 1B is a sub-isolation region, and 108 is an element forming region. Or the second
As shown in the figure, the semiconductor epitaxial layer 203 is selectively etched onto the semiconductor substrate 2 by a method such as dry etching.
There is a method in which after removing up to the 01 surface, oxidation is performed and polycrystalline silicon etc. 207 is packed into the recess 204. In the figure, 205 is a sub-isolation area, 2
06 is a silicon oxide film, and 208 is an element formation region. However, in the method shown in FIG. 1, the sub-isolation region 106 is formed by forming the lowest potential region of one conductivity type before or after removing the semiconductor epitaxial silicon layer 103 where the thick oxide film 107 is formed. If regions are to be simultaneously formed by ion implantation, if a photoresist is used as a mask for ion implantation, a high dose will be required to form a high concentration region, and in this case, the problem of generation of gas etc. from the photoresist will occur. arise. Therefore, the dose of ion implantation cannot be increased too much, and in order to form a thick silicon oxide film 107, the semiconductor silicon epitaxial layer is oxidized twice, so the silicon oxide film is implanted into the element formation region 108. The drawback was that the bite was large.

Further, in the method shown in FIG. 2, the sub-isolation region 204 is formed after etching the semiconductor silicon epitaxial region 203, but in this case, the lowest potential region is also implanted with ions having one conductivity type. If you try to form the ion implantation by increasing the ion implantation dose as mentioned above, you will have to increase the ion implantation dose.
When the concentration exceeds 10 ¹⁴ atoms/cm ² , there is a drawback that problems such as gas generation occur.

Therefore, the present invention has been devised to address the above-mentioned problems, and it is possible to form an isolation with less digging into the element region of the insulator, and at the same time, it is possible to form a region and a sub-isolation region for lowering the potential of the semiconductor substrate to the lowest potential. At the same time, it is an object of the present invention to provide a method for manufacturing a semiconductor device that can be formed by high-concentration ion implantation.

The gist of the invention is to form a buried region of an opposite conductivity type on a selected region of a semiconductor substrate of one conductivity type;
A step of forming a semiconductor region of the same conductivity type as the buried region on the surface, forming an insulating film on the semiconductor region, and performing selective oxidation using the insulating film as a mask to form an oxide film to a depth close to the semiconductor substrate. , and then completely removing the oxide film; thinning the insulating film in a selected portion of the insulating film used as the selective oxidation mask; A step of introducing impurities by ion implantation through a thinned region to form a region having the same conductivity type as the semiconductor substrate and having a higher concentration of impurities than the substrate, and oxidation using the insulating film as a mask until reaching the semiconductor substrate. and forming an element such as a transistor in each semiconductor region separated by the oxide film.

The present invention will be described in detail below based on embodiments with reference to the drawings. 3A to 3D are process cross-sectional views for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention.

Note that this example is applied to an NPN bipolar transistor and consists of the following steps.

(1) First, an N-type buried region 302 is formed on a P-type silicon substrate 301, and an N-type epitaxial silicon layer 303 is grown thereon. Next, the entire surface is thinly oxidized to form a silicon oxide film 304. Then, a silicon nitride film 305 is formed thereon by low pressure CVD (hereinafter abbreviated as LPCVD),
Thereafter, a CVD silicon oxide film 306 and a thick plasma CVD (hereinafter abbreviated as PCVD) silicon nitride film 307 are formed over the CVD silicon oxide film 306 (FIG. 3a).

(2) Next, a region surrounding the N-type buried region 302,
In the region surrounding the region 308 for bringing the P-type silicon substrate 301 to the lowest potential,
PCVD silicon nitride film 307, CVD silicon oxide film 306, LPCVD silicon nitride film 305
After selectively removing the silicon oxide film 304, the N-type epitaxial silicon layer 303 is selectively oxidized. This selective oxidation is performed halfway in the depth direction of the epitaxial silicon layer.

Next, after removing the thick oxide film formed by this selective oxidation by etching, the P-type silicon substrate 301 is further brought to the lowest potential in the region 3.
Thick PCVD silicon nitride film 30 on 08
7 and the CVD silicon oxide film 306 thereunder are selectively removed.

Next, a thick PCVD silicon nitride film 307 is used as a mask for ion implantation, and a thin
In the area where only the LPCVD silicon nitride film 305 exists, the sub-isolation region 309 is etched using the PCVD silicon nitride film 307 as a mask so that the lowest potential region 308 can be formed through the LPCVD silicon nitride film 305. Side surface 3 of the recess in the epitaxial layer
P-type impurities are ion-implanted by selecting the ion-implantation energy and dose so as not to extend to 10. In this ion implantation, PCVD
Since the silicon nitride film 307 is used as a mask, the dose amount can be increased without problems such as gas generation, unlike the conventional manufacturing method using a photoresist as a mask. In addition, the lowest potential region 3 connected to the P-type silicon substrate 301
Since 08 is also of P type, its resistance value is small (Fig. 3b).

Next, thick PCVD silicon nitride film 307 and thin
Using the LPCVD silicon nitride film 305 as a mask, a thick silicon oxide film 311 is formed so that the silicon oxide film reaches the P-type silicon substrate 301. At this time, in the region where the oxidation is performed using the thick PCVD silicon nitride film 307 as a mask, there is an advantage that the penetration of the silicon oxide film 311 into the bottom of the PCVD silicon nitride film 307 (so-called bird's beak) is reduced. The encroachment of the silicon oxide film 311 is reduced, and the semiconductor integrated circuit can be miniaturized (FIG. 3c).

Next, a collector compensation region 313, a base region 314, an emitter region 315, an interlayer insulating film 316, and an aluminum wiring 317 are formed in the P-type epitaxial silicon layer 302 in the element formation region. In such a case, an NPN bipolar transistor to which the present invention is applied can be obtained (FIG. 3d).

In this way, if the manufacturing method of forming the sub-isolation region of the inter-element distance and the region where the silicon substrate is lowered to the lowest potential using the insulator obtained by the present invention is used, ion implantation can be performed using a thick PCVD silicon nitride film as a mask. Therefore, high concentration impurity ions can be implanted without generating gas or the like, unlike when a photoresist is used as a mask. Therefore, in order to lower the potential of the silicon substrate to the lowest potential, it is possible to lower the resistance value of the connection portion from the surface of the semiconductor epitaxial layer to the silicon substrate. In addition, since the lateral encroachment of the thick silicon oxide film into the element region can be reduced, it is possible to obtain a high-density semiconductor integrated circuit with small element spacing.

Although the embodiment of the present invention described above is applied to a semiconductor integrated circuit using an NPN bipolar transistor, it can of course be applied to a semiconductor integrated circuit using a PNP bipolar transistor, and it can also be applied to a semiconductor integrated circuit using a field effect transistor. It is also applicable to semiconductor integrated circuits.

As explained above, according to the present invention, it is possible to form an isolation with little intrusion into the element region of the insulator, which is effective for small size and high density.
This method has the advantage that a region for lowering the potential of the semiconductor substrate to the lowest potential and a sub-isolation region can be simultaneously formed by performing high-concentration ion implantation.

[Brief explanation of drawings]

1A to 2B are cross-sectional views of main parts of each step showing a conventional semiconductor device manufacturing method;
Figures a to d are cross-sectional views of main parts by step, showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. 101,201...Semiconductor substrate, 102,20
2...Buried region, 103, 203...Semiconductor epitaxial layer, 104...Silicon nitride film, 10
5,204... Concavity etched in semiconductor epitaxial layer, 106,205... Sub-isolation region, 107... Thick silicon oxide film,
108, 208...Element formation region, 206...Silicon oxide film, 207...Polycrystalline silicon, 30
1... P-type silicon substrate, 302... N-type buried region, 303... N-type epitaxial region, 304
...Silicon oxide film, 305...LPCVD silicon nitride film, 306...CVD oxide film, 307...
PCVD silicon nitride film, 308...lowest potential region, 309...sub-isolation region, 31
0...Side surface of the concave portion of the N-type epitaxial layer, 31
1... Thick silicon oxide film, 312... Element formation region, 313... Collector compensation region, 314...
Base area, 315... Emitter area, 316...
...Interlayer insulating film, 317...Aluminum wiring.

Claims (1)

[Claims] 1. Forming a buried region of an opposite conductivity type on a selected region of a semiconductor substrate of one conductivity type, and forming a semiconductor region of the same conductivity type as the buried region on the surface;
forming an insulating film on the semiconductor region, performing selective oxidation using the insulating film as a mask, forming an oxide film to a depth close to the semiconductor substrate, and then removing the oxide film entirely; A step of thinning the insulating film in a selected part of the insulating film used as a mask, and introducing impurities by ion implantation through the region where the oxide film has been removed and the region where the insulating film has been thinned to make the same conductivity type as the semiconductor substrate. a step of forming a region having a higher concentration of impurities than the substrate; a step of oxidizing using the insulating film as a mask until reaching the semiconductor substrate to form an oxide film surrounding the semiconductor region; A method of manufacturing a semiconductor device, comprising the step of forming an element such as a transistor in each semiconductor region. 2. The step of thinning the insulating film at a selected portion of the insulating film used as a selective oxidation mask is a thick silicon nitride film formed via a pre-designed thin silicon nitride film and a thin silicon oxide film, 2. The method of manufacturing a semiconductor device according to claim 1, wherein the step includes removing the thick silicon nitride film and the thin silicon oxide film to leave a thin silicon nitride film.