JPS63215073A - Bipolar integrated circuit - Google Patents

Abstract

PURPOSE:To reduce the collector series resistance by a method wherein an emitter region, a base region and a collector.contact region are formed along almost vertical side and sidewall of a columned protrusion formed on the surface of a semiconductor substrate and a hole made therein. CONSTITUTION:A columned protrusion 12 is formed on a p type semiconductor substrate 11 further an n type collector region 13 is formed from the inside of columned protrusion 12 to the p type semiconductor substrate 11. A p<+>-type base region 14 and an n<+>-type emitter region 15 are formed along the side of columned protrusion 12. Besides, an emitter electrode 17 is connected to an n<+>-type emitter region 15 on the side of columned protrusion 12. Furthermore, the columned protrusion 12 is perforated to make a hole 18. Finally, the n-type contact region 13 is connected to a collector electrode 20 through the intermediary of an n type collector.contact region 19 formed along the sidewall of hole 18.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a bipolar integrated circuit suitable for high integration.

Among conventional semiconductor integrated circuits, bipolar integrated circuits have the features of lower noise, wider bandwidth, lower offset, and higher switching speed than MO8 integrated circuits, and are mainly used in analog integrated circuits and ultra-high-speed digital integrated circuits. Widely used.

FIG. 2 shows a cross-sectional view of a conventional bipolar integrated circuit.

In this bipolar integrated circuit, an n-type epitaxial layer 2 formed on a p-type semiconductor substrate 1 is electrically isolated from each other by a p-domain isolation region 3, and a p-domain base region 4 is provided within the n-type epitaxial layer 2. , an n-type emitter region 5 and an n+-type collector contact region 6 are formed, and an n-type sub-collector region 7 is further formed near the interface between the n-type epitaxial layer 2 and the p-type semiconductor substrate 1. be.

Problems to be Solved by the Invention In the conventional bipolar integrated circuit as described above, electrons injected from the emitter mainly flow in a direction perpendicular to the main surface of the semiconductor substrate and reach the epitaxial layer, which is the collector. . On the other hand, since the collector contact region is formed on the main surface of the semiconductor substrate, once the electrons reach the epitaxial layer, they first flow laterally.
It then flows toward the main surface of the semiconductor substrate and reaches the collector contact region. Such a flow of electrons in the lateral direction and toward the main surface appears as collector series resistance. The n+ type collector region is provided in order to reduce this collector series resistance, but it must be formed before epitaxial growth, and impurities in this n+ type collector region are formed in the epitaxial layer during epitaxial growth. There are also problems in that a so-called auto-doping phenomenon occurs, and crystal defects in the collector region of the n+ type are carried over to the epitaxial layer.

Means for Solving the Problems In order to solve the above-mentioned problems, the bipolar integrated circuit of the present invention has a columnar projection including a first diffusion region serving as a collector region formed on a semiconductor substrate. A hole is formed by drilling from the top surface of the columnar protrusion, a second diffusion region serving as a base region and a third diffusion region serving as an emitter region are formed along the side surface of the columnar protrusion, and the base electrode is connected to the columnar projection. - connected to the second diffusion region on at least one of the top surface or the vicinity of the base of the columnar projection, an emitter electrode connected to the third diffusion region on the side surface of the columnar projection, and a collector electrode is connected to the first diffusion region at the side wall of the hole.

Operation The bipolar integrated circuit of the present invention does not use an epitaxial layer or a subcollector region (it has a low collector series resistance and is suitable for high integration).

Embodiment An embodiment of the bipolar integrated circuit of the present invention is shown in FIG.
This will be explained with reference to this.

As shown in the figure, a columnar protrusion 12 is formed on a p-type semiconductor substrate 11, and an n-type collector region 13 is further formed from inside the columnar protrusion 12 to the p-type semiconductor substrate 11. A p-shaped base region 1 is formed along the side surface of the columnar projection 12.
4 and an n+ type emitter region 15 are formed. The base electrode 16 is connected to the p+ dec-shaped base region 14 near the top surface and root of the columnar projection 12. Furthermore, the emitter electrode 17 is connected to the n+-shaped emitter region 15 on the side surface of the columnar projection 12 . Furthermore, columnar projection 1
A hole 18 is formed by drilling 2. The n-type collector region 13 is connected to the collector electrode 2 through the n-type collector contact region 19 formed along the side wall of the hole 18.
Connected to 0.

Note that in the above structure, insulation between adjacent transistors (not shown) can be achieved by applying voltages in opposite directions to the n-type collector region 13 and the p-type semiconductor substrate 11.

In the structure of this bipolar integrated circuit, electrons injected from the n-type emitter region 15 mainly flow perpendicular to the side surfaces of the columnar protrusions 12, that is, parallel to the top surfaces, to reach the n-type collector region 13, and then to the n-type collector region 13. contact area 1
9 to the collector electrode 20. That is, the distance traveled by electrons in the collector region is short, resulting in low collector series resistance. Also, since no epitaxial layer or sub-collector region is required, the process is simple and there are fewer problems such as crystal defects.

Furthermore, since the emitter width of the transistor is determined by the height of the columnar protrusion 12, submicron width emitters can be easily and reproducibly realized without using methods such as electron beam lithography. Since the emitter region, base region, and collector contact region are formed using the almost perpendicular sides and side walls of the hole, the planar area of each region can be made extremely small, allowing for high integration. suitable for

In the embodiment shown in FIG. 1, the n-type collector region 13 is formed from the inside of the columnar protrusion 12 to the p-type semiconductor substrate 11, but this does not necessarily have to reach the p-type semiconductor substrate 11. Good too.

Further, although the planar shapes of the columnar protrusions 12 and holes 18 are not shown in the embodiment of FIG. 1, they may have any shape such as a square, a rectangular nine circle, or an ellipse.

Further, in the embodiment shown in FIG. 1, the connection between the p + decagonal space region 14 and the base electrode 16 is made both at the top surface and near the base of the columnar projection 12, but this may be done only at either one. .

In addition, although NPN transistors are used in the embodiments for convenience of explanation, a similar structure can be formed using PNP transistors.

Effects of the Invention The bipolar integrated circuit of the present invention has an emitter region along a side wall and a substantially perpendicular side surface of a columnar projection formed on the main surface of a semiconductor substrate and a hole bored therein.

Since a base region and a collector contact region are formed, carriers travel parallel to the top surface of the columnar protrusion, that is, parallel to the main surface of the semiconductor substrate, and the collector series resistance can be reduced without an epitaxial layer or subcollector region.゛. Furthermore, it is suitable for submicronization and high concentration.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing an embodiment of a bipolar integrated circuit according to the present invention, and FIG. 2 is a sectional view showing a conventional bipolar integrated circuit. 12... Columnar projection, 13... N-type collector region, 14... P-shaped base region, 15.
......n-type emitter region, 16...base electrode, 17...emitter electrode, 18...
...hole, 19...-n-type collector contact area, 20...collector electrode. Name of agent: Patent attorney Toshio Nakao and 1 other person 12-1
l 13- rL type collector area 14--P'' type base 4g1J! +5-・σ type emifter tilted 16- base to gutter +7- emitter electrode 18- missing +9- rl'' type collector contact 4X area Fig. 1
Fig. 2

Claims (1)

[Claims] A columnar protrusion including a first diffusion region that becomes a collector region is formed on a semiconductor substrate, a hole is formed by drilling the columnar protrusion from its top surface, and a second diffusion region that becomes a base region is formed along the side surface of the columnar protrusion. A third diffusion region serving as a diffusion region and an emitter region is formed, a base electrode is connected to the second diffusion region at least in the vicinity of the top surface or the root of the columnar projection, and an emitter electrode is connected to the second diffusion region in the vicinity of the columnar projection. A bipolar integrated circuit, wherein the protrusion is connected to the third diffusion region on a side surface thereof, and a collector electrode is connected to the first diffusion region on a side wall of the hole.