JPS63192112A - Stabilized power supply circuit - Google Patents

Abstract

PURPOSE:To increase an effective application range of the power supply voltage by detecting directly a load current equivalent to the load current flowing through an output transistor and comparing the level of said detected load current with a reference current level. CONSTITUTION:A 1st transistor TR Q107 detects a load current. When this detected load current is less than a reference current level formed by a TR Q 105 serving as a constant current source, a 2nd TR Q110 is kept under an OFF state since its base current is equal to a sink current led toward the constant current source TR Q105. When the detected load current is higher than the reference current level, the TR Q110 is kept under an ON state since its base current is equal to an OUT current supplied from the TR Q107. As a result, the TR Q105 is turned off and the error amplifier circuits Q101-Q104 stop their functions. Thus the output TR Q106 is turned off. In such a way, an application range of the power supply voltage is increased.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a stabilized power supply circuit, and particularly to a stabilized power supply circuit that operates at low voltage.

(Prior Art) A stabilized power supply circuit that operates at a low voltage is used in a device that needs to be operated with a single dry cell battery, such as an individual selective call receiver.
It is designed to obtain a stabilized output of a certain degree.

By the way, if the dry battery has a large current capacity and low internal impedance, such as a nickel-cadmium battery, if the stabilized output terminal is grounded for some reason, the output transistor will be damaged due to short circuit overcurrent. In the worst case, the device may be damaged due to abnormal heat generation of the battery. Therefore, this type of low voltage stabilized power supply circuit is equipped with a load current limiting circuit to prevent short circuit overcurrent.

Conventionally, as such a stabilized power supply circuit, for example, a third
The one shown in the figure is known. In Figure 3, battery 2
The emitter of the output transistor Q203 consisting of a PNP transistor and the reference voltage circuit 201 are connected to the power supply line 05.
The input terminals of the reference voltage circuit 201 are connected to each other, and the output terminal of the reference voltage circuit 201 is connected to the inverting input terminal of the operational amplifier 202.

A series circuit of resistors R2O3, R202, and R201 is connected between the collector of the output transistor Q2'os and the ground, and the terminal voltage of the resistor R2o on the collector side serves as an input signal to the comparator 204.

Further, a load 203 is connected between the connection point between the resistors R2o and R2o2 and the ground, and the connection point between the resistors R2o2 and R201 is connected to the non-inverting input terminal of the operational amplifier 202. The output of the comparator 204 is then given to the operational amplifier 202 as a control signal.

In the above configuration, the reference voltage circuit 201, operational amplifier 202, and output transistor Q20S are the basic components of the stabilized power supply circuit. Since the operational amplifier 202 has a voltage follower configuration, the output voltage V, ) supplied to the load 203 is the reference voltage generated by the reference voltage circuit 201, VR,
, then Vo = VR, ,xR+R R201--(1).

The resistor R2o and the comparator 204 constitute a load current limiting circuit.

That is, the comparator 204 detects the voltage drop across the resistor R2o3 due to the load current flowing through the output transistor Qzo3, and when the voltage drop becomes a potential difference greater than a certain voltage, that is, when the load current exceeds a certain value, the comparator 204 Change the output state. Then, operational amplifier 2
02 makes the output impedance infinite, for example, in response to a change in the output state of the comparator 204, and turns off the output transistor Q 20B. As a result, even if there is a load short circuit, an overcurrent exceeding a predetermined current value is prevented from flowing.

(Problems to be Solved by the Invention) However, the above-described load current limiting circuit has a configuration in which a resistor converts a load current change into a voltage change, and a comparator detects the voltage change.

Regarding the output transistor Qzos, the collector-emitter voltage Vca decreases as the power supply voltage decreases, but the collector saturation voltage 7cm1.2
．． It is well known that the size cannot be reduced below.

Therefore, the minimum required power supply voltage in a conventional stabilized power supply circuit is the output voltage v0 and the output transistor Q20.
Collector saturation voltage of 3 ■. E(aatl and resistor R20B
The voltage is the sum of the voltage drop V R2O3.

In other words, in the conventional stabilized power supply circuit, it is necessary to take into account the voltage drop VR203 as the lowest voltage of the power supply voltage, and there is a problem that the power supply cannot be used effectively by this voltage drop VR201.

For example, the detected potential difference of the comparator 204 is 50s+v
Assuming that the load current limiting circuit is activated when twice the normal load current flows, the voltage drop VR203 during normal operation is 25 V, so the usable range of the power supply voltage will be narrowed by 25 mv. It is. This problem is important because this type of stabilized power supply circuit is used in devices that basically have a narrow range of power supply voltage, such as individual selective call receivers that operate on battery power.

The present invention has been made in view of these conventional problems, and its purpose is to provide a stabilized power supply circuit equipped with a load current limiting circuit that does not hinder the effective use of power supply voltage. .

(Means for Solving the Problems) In order to achieve the above object, the stabilized power supply circuit of the present invention has the following configuration.

That is, the stabilized power supply circuit of the present invention includes a reference voltage circuit that generates a reference voltage, an error amplification circuit that amplifies the difference voltage between the feedback voltage of the load voltage and the reference voltage, and a stabilized power supply circuit that responds to the output of the error amplification circuit. a first transistor whose base and emitter are commonly connected to the output transistor and which detects the load current; a collector of the first transistor; a constant current source that is connected to form a reference current for giving a limit value of the detected load current; a base connected to a connection point between the collector of the first transistor and the constant current source so that the detected load current is a reference current; and a second transistor that stops the circuit operation of the error amplification circuit when the error amplification circuit exceeds the load current limit circuit.

(Function) Next, the function of the stabilized power supply circuit of the present invention configured as described above will be explained.

If the stabilized power supply circuit is operated by, for example, a positive polarity power supply, the output transistor is a PNP transistor, the emitter of which is connected to the power supply line. A resistor for forming a feedback voltage is connected between the collector of the output transistor and ground, and a load is connected in parallel to this resistor.

Furthermore, it is assumed that the error amplification circuit is composed of a transistor differential amplification circuit, and that a transistor constant current source as a load is connected between its common emitter and ground.

Then, the connection relationship of each element constituting the load current limiting circuit according to the present invention is as follows.

The first transistor is PN similar to the output transistor.
It consists of a P transistor, the base and emitter of which are commonly connected to the output transistor, and a constant current source is connected between the collector and ground. The second transistor is an NPN transistor, and has a base connected to a connection point between the collector of the first transistor and the constant current source, a collector connected to the base of the transistor constant current source, and an emitter. will be grounded.

In the above configuration, the first transistor detects the load current. Here, since the first transistor is provided in parallel with the output transistor, the magnitude of the detected load current does not necessarily have to be the same as the magnitude of the actual load current flowing through the output transistor. When the load current is smaller than the reference current generated by the constant current source, that is, when the load current is small, the base current of the second transistor becomes a sink current that is drawn toward the constant current source, so that the second transistor maintains an off state. The error amplifier circuit performs normal operation and the required regulated output voltage is applied to the load.

Next, when the detected load current is larger than the reference current,
That is, when the load current becomes excessive, the base current of the second transistor becomes an out current supplied from the first transistor side, so that the second transistor is turned on. As a result, the transistor constant current source is turned off and the error amplification circuit stops its function, so that the output transistor is turned off.

Here, the minimum power supply voltage necessary to obtain a predetermined stabilized output voltage is the output voltage plus the collector saturation voltage of the output transistor.

This is independent of the presence of the load current limiting circuit of the present invention.

As explained above, according to the stabilized power supply circuit of the present invention, the load current limiting circuit does not detect the load current flowing through the output transistor, but directly detects the load current corresponding to the load current flowing through the output transistor. Since the load current is detected and the magnitude relationship between the detected load current and the reference current is determined, the minimum power supply voltage required to obtain a predetermined stabilized output voltage is equal to the collector saturation voltage of the output transistor at that output voltage. is added.

That is, it is no longer necessary to take into account the voltage drop caused by the detection resistor as in the prior art, and the range of effective use of the power supply voltage is expanded accordingly.

Furthermore, since the load current limiting circuit according to the present invention is mainly composed of transistors, the number of circuit elements is significantly reduced and the circuit configuration is simplified compared to a conventional circuit using a comparator. can get.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a stabilized power supply circuit according to an embodiment of the present invention. This is what I did.

In FIG. 1, Q 101. Q xoz, Q lo
g and Q104 are transistors forming an error amplification circuit, and differential transistors Q1ot and Qxoa
The collector of the transistor Q sos is connected to the common emitter of the transistor Q sos, and the emitter of the transistor Q sos is grounded. Also, transistor Q10! The base of the transistor Q111 is connected to the base (collector) of a diode-configured transistor Q11, and the collector (base) of the transistor Q111 is connected to the power supply line via the resistor R103, and the emitter is connected to the ground.

In short, the transistor Q Io5 is the resistor RIo.

A constant base bias is applied by the transistor Q11 and the transistor Qllll, forming a transistor constant current source that forms a constant collector current (ie, common emitter current) 1102.

Q>oa is a PNP type output transistor, the emitter of which is connected to the power supply line, and a resistor RI02 for forming a feedback voltage between the collector and ground. A series circuit of the same RIO is connected, and a load 102 is connected in parallel with these. The connection point between resistor R1o2 and FL1o is connected to the base of transistor Q102, and
The output end of the reference voltage circuit 101 is connected to the base of 1ot.

The reference voltage circuit 101 has an input end connected to a power supply line,
A predetermined reference voltage VR, , is formed.

The above is the basic configuration of the stabilizing current circuit. As before, the output voltage vo is Vo - Votv X R+R-11111 (2) IO
It is I.

Next, Q10 is the first transistor, which is a PNP type transistor. This first transistor Q107
The emitter is connected to the power supply line, and the base is connected to the transistor Q.
Each lot is connected to a collector. That is,
The base and emitter of output transistor Q106 are commonly connected.

Here, the first transistor QIO? The emitter area of is 1/n times that of the output transistor Q106. That is, the collector voltage yt of the first transistor constant current source<detected load current) is IQIO? and the collector current (load current) of the output transistor Q106 is I
If L, then IQI. 7=”! This is a measure to reduce current consumption.

The collector of this first transistor Q107 is an NPN type transistor Q109 which is a constant current source.
connected to the collector of The emitter of the transistor Q1.9 is grounded, and the base is connected to the base (collector) of a diode-configured transistor Qtoa. The emitter of the transistor Qsoa is grounded, and the collector (
A constant current source I'lO1 is provided between the base) and the power supply line. In short, the transistor Q 109 is operated at a constant current by the constant current source I 101 and the transistor Q zo8. In other words, since the transistor constant current source is used, the constant current source Itot and the transistor Qsoa are required.

Here, if the collector current of the transistor Q 109, that is, the reference current is I 9109, this reference current I Q
IQ9 is determined by the current value set by constant current source I 101 and is greater than or equal to 0, so that the first transistor constant current source and transistor Q 109 form a current comparator.

Also, Q110 is a second transistor, which is an NPN transistor.
Consists of types. This second transistor Qlt
o has a base connected to the common collector of the first transistor QIOoff and the transistor Q109, an emitter grounded, and a collector connected to the base of the transistor Q109. In short, this second transistor Q
sto is a switching transistor that is controlled on and off by the output of a current comparator, and when turned on, transistor Q! 05 to the off state.

The configuration of the load current limiting circuit has been described above, and its operation will now be described.

When the load current is small and IQ107<IQ109, the base current of the second transistor Q10 is drawn toward the transistor Q109 (sink current), so that it is turned off. Therefore, transistor Q
xos operates normally, the error amplification circuit is not affected in any way, and a predetermined stabilized output voltage is applied to the load 102.

On the other hand, when the load current is large and IQIO>lQ109, the second transistor Qllo has a base current that is
Since the current is supplied from the transistor Q107 (out current), the current is turned on. Then, the base potential of the transistor Q105 becomes a low level below the operating voltage, so that the transistor Q105 is turned off.

That is, the error amplification circuit has a common emitter current I! . 2 will no longer flow, so stop the operation. As a result, the supply of base current to the output transistor is interrupted and the output transistor is turned off.

In short, in the load current limiting circuit in this embodiment, I Q107'' I
I Q10 after the state of Q109? ＞I Q10
9, that is, when the load current IL becomes the reference current IQ1
If the value is greater than n times 09, the stabilized power supply output is set to a low level. Conversely, load current IL is equal to reference current IQ
I. , is limited to n times.

FIG. 2 shows the result of simulating this load current limiting characteristic using the well-known circuit simulation program "SPICE-S".

In this simulation, the output current of the constant current source I 101 is 10 μA, n=100, that is, the current limit value is 1
mA, the output voltage is 1V, and how much load current can be extracted using a heavy load is calculated. As is clear from FIG. 2, even when the load is short-circuited and the output voltage is zero, the load current can be made to flow only about 1 mA.

Furthermore, this simulation shows that the stabilized power supply circuit can stably perform the overcurrent limiting operation. That is, since the first transistor Qso operates in the same manner as the output transistor Q*os, when the output transistor Q106 turns off, the first transistor QIOW also turns off. Then, the second transistor Q11o is turned off, and the error amplification circuit resumes operation. In other words, if overload etc. continues, there is a fear that a so-called loop will be formed.
It turned out that there was no need to worry.

Furthermore, FIG. 2 suggests that the voltage fluctuation rate is excellent. Specifically, the voltage fluctuation rate is calculated as follows.

The error Δ■o in the output voltage is mainly caused by the base current of the output transistor Qto6, if the offset shown in Vll due to the variation in the base-emitter voltage VIE of the differential transistor of the error amplifier circuit is ignored. That is, the base current IB of the output transistor Qloa is I3=''!, where IL is the load current and β is the current amplification factor. β, but this base current IB is the differential transistor (Q
101. One transistor Qto of Q102)
t, and the differential transistor (QIOI
.

An unbalance occurs in the emitter current of Q + oz), and this becomes an offset voltage ΔVBε of the error amplifier circuit.

Therefore, differential transistors (Q lot, Q 102
) is, when balanced, the emitter current of
Since the common emitter current I102 is divided into two, if their base currents are ignored, their respective collector currents will be 1102/2. Therefore, the base-emitter voltage V BE (QIO
II becomes, and the base-emitter voltage VB11 (Q102) of transistor Q102 becomes, where 1. is the saturation current, Vτ is K T / q
(K: Boltzmann constant, T: absolute temperature, q: unit charge amount).

On the other hand, the base current I8 of the output transistor Q tea causes the differential transistor (Q 101.
If there is an imbalance in the emitter current of
Since the collector current is also the same, it becomes a transistor,
In addition, in the transistor Q 102, L plate - one - Vai + oxoz + = Vt L + -
It becomes m---(6). Therefore, the offset voltage ΔV
86 is as follows. Due to this offset voltage Δv0, the output voltage error ΔVo is ΔVo=ΔVi+iX ” −−m−・
--(8), so the voltage fluctuation rate α is α=ΔVo/V
It can be obtained as o.

So, for example, I L = 500 μA, V T
= 26 mV, I 102 = 200, uA, ln
=500μ^/40, β=40, Riot =85Ω
, R102=15Ω, Vo=1. Calculated as OV, ΔVet=3.2mV, ΔVo=3,7 mV
, a = 0.4%.

As is clear from the circuit configuration of FIG. 1, according to the stabilized power supply circuit of the present invention, the lowest power supply voltage required to obtain a predetermined stabilized output voltage is the output transistor Q106.
It is sufficient if only the collector saturation voltage of is taken into consideration. This is independent of the presence of a load current limiting circuit.

In addition, although the embodiment described above shows the case where it is integrated, the present invention is not limited to this, and may be constructed from individual parts. It is also possible to configure

(Effects of the Invention) As explained above, according to the stabilized power supply circuit of the present invention, the load current limiting circuit does not detect the load current flowing through the output transistor, but detects the load current flowing through the output transistor. Since the current is directly detected and the magnitude relationship between the detected load current and the reference current is determined, the minimum power supply voltage required to obtain a predetermined stabilized output voltage is determined by the output voltage. This is the sum of the collector saturation voltage of the transistor.

That is, it is no longer necessary to take into account the voltage drop caused by the detection resistor as in the prior art, and the range of effective use of the power supply voltage is expanded accordingly.

Furthermore, since the load current limiting circuit according to the present invention is mainly composed of transistors, the number of circuit elements is significantly reduced and the circuit configuration is simplified compared to a conventional circuit using a comparator. can get.

[Brief explanation of the drawing]

FIG. 1 is a detailed circuit diagram of a stabilized power supply circuit according to an embodiment of the present invention, FIG. 2 is a load current limiting characteristic diagram, and FIG. 3 is a circuit diagram of a conventional stabilized power supply circuit. 101...Reference voltage circuit, 102...
...Load, 103...Battery, Q tos,
Q toz, Q tos, Q 104-...Transistor forming the error amplification circuit, Q+os...
・Transistor that serves as a constant current source, Q106...
・Output transistor, Q10? ...First transistor, Qloq...Transistor serving as a constant current source, Qlto...Second transistor. Agent: Yoshihiro Yahata, Patent Attorney (: Jtot, Qtoz, Qm3.OtH---!I
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Claims (3)

[Claims] (1) A reference voltage circuit that generates a reference voltage, an error amplifier circuit that amplifies the difference voltage between the feedback voltage of the load voltage and the reference voltage, and an output that controls the load current in response to the output of this error amplifier circuit. a first transistor whose base and emitter are commonly connected to the output transistor and which detects the load current; and a first transistor which is connected to the collector of the first transistor and which limits the detected load current. a constant current source that forms a reference current for giving a value; a base connected to a connection point between the collector of the first transistor and the constant current source, and when the detected load current exceeds the reference current, the error amplification circuit; A stabilized power supply circuit comprising: a second transistor for stopping circuit operation; and a load current limiting circuit. (2) The output transistor and the first transistor each include a PNP transistor, and the second
The stabilized power supply circuit according to claim 1, wherein the transistor is an NPN transistor. (3) The error amplification circuit is composed of a transistor differential amplification circuit, and a transistor constant current source as a load is connected to its common emitter, and the base of this transistor constant current source is connected to the collector of the second transistor. A stabilized power supply circuit according to claim (1), characterized in that: