JPS63181588A - Color difference signal reproducing circuit - Google Patents

Abstract

PURPOSE:To suppress the fluctuation of the blanking level of a color difference signal and to prevent influence such as a waveform flaw by detecting the color difference signal level of a vertical fly-back line period, comparing the color difference signal level of a signal period with a detecting level and adjusting the blanking level of the color difference signal. CONSTITUTION:A sample-and-hold circuit 62 samples an input signal according to signal (h). A differential amplifier 64 compares the output voltage of a sample-and-hold circuit 56 with the output voltage of the sample-and-holding circuit 62 and outputs a voltage indicating the difference. When there is a level difference in an offset between a (R-Y) line and a (B-Y) line in an input terminal 30, a potential difference is generated between the output voltage of the sample- and-hold circuit 56 and the output voltage of the sample-and-hold circuit 62. Accordingly, in order to eliminate the level difference in the offset, a level control circuit 66 follows the output of the differential amplifier 64 to apply a signal canceling the offset part of a signal inputting to clamping circuits 34, 36 to adders 60, 61.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a reproduction circuit for color difference signals in a video reproduction device.

[Conventional technology]

When adjusting the level of the reproduced color difference signals R-Y and B-Y in a color still video playback device, conventionally, the circuit shown in Fig. 2 blocks the level of the color difference signal when there is no signal. It was adjusted to be the same as the ranking potential.

In FIG. 2, a reproduced line-sequential color difference signal is input to an input terminal 10, and a line-sequential color difference signal delayed by one horizontal scanning period from the signal at the input terminal 10 is input to an input terminal 12. Clamp circuits 14 and 16 receive and clamp signals from input terminals 10 and 12, respectively, and connect three contacts x, y, and
z switch 18.20. switch 18.2
The reference voltage V of the reference voltage source 26 is connected to the contact X of the switch 18, and the contact 2 of the switch 20 is connected to the contact X of the switch 18.
is connected to the output of the clamp circuit 16, and contact 2 of the switch 18 and contact y of the switch 20 are connected to the output of the clamp circuit 14.

By switching the switches 18 and 20, the line-sequential signal is converted into line-sequential signals. Switches 18 and 20 also perform blanking processing to remove noise during the horizontal blanking period. The connection terminals of the switches 18 and 20 are switched as shown in g in FIG. In FIG. 3, e indicates a line switching signal, and f indicates a blanking signal. Furthermore, a clamp pulse CP that is at a high level, for example, is input to the clamp circuits 14 and 16 during a part of the blanking period.

With the circuit configuration shown in FIG. 2, the clamp potentials of the clamp circuits 14 and 16 are adjusted so that when there is no color difference signal, the signals at the output terminals 22 and 24 have the same potential as the blanking potential.

[Problem that the invention seeks to solve]

However, in such a configuration, deviations from the blanking level of the signal are likely to occur when there is a flaw or the like at a location where the input signal should be clamped, when the emphasis of the color difference signal is not well matched, and so on. Furthermore, in a system such as a still video recording apparatus that records RY and BY line-sequentially with offsets, it is susceptible to variations in the offsets. Furthermore, since the human eye is very sensitive to line-by-line color unevenness caused by deviations in blanking of color difference signals, there is a problem in that variations in blanking tend to be noticeable.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a color difference signal reproducing circuit that suppresses variations in the blanking level of color difference signals and is less susceptible to waveform flaws.

[Means for solving problems]

A color difference signal reproducing circuit according to the present invention includes a detection means for detecting a color difference signal level during a vertical retrace period, a comparison means for comparing a color difference signal level during a signal period with a detection level by the detection means, and a comparison between the comparison means. and adjusting means for adjusting the blanking level of the color difference signal according to the result.

[Effect]

With the detection means, it is possible to use the level during the vertical retrace period, when the color difference signal should be non-signal, as a reference for color adjustment, and therefore it is possible to suppress variations in the blanking level of the color difference signal. Furthermore, feedback control by the comparison means makes it less susceptible to effects such as temperature drift and waveform flaws.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a block circuit according to an embodiment of the present invention.

In FIG. 1, a reproduced line-sequential color difference signal is input to an input terminal 30, and a line-sequential color difference signal delayed by one horizontal scanning period from the signal at the input terminal 30 is input to an input terminal 32. Clamp circuits 34 and 36 receive and clamp signals from input terminals 30 and 32, respectively, and connect three contacts x, y, and
z switch 38.40. switch 38.4
The reference voltage Vr*f of the reference voltage source 42 is connected to the contact X of the switch 38, and the contact 2 of the switch 40 is connected to the output of the clamp circuit 36. The contact y is connected to the output of the clamp circuit 34. The action of switch 38.40 itself is the third
This is the same as switches 18 and 20 in the figure, and is switched at the timing g in FIG. 3.

The output signals from the switches 38 and 40 are line-timed color difference signals, which are supplied to subsequent circuits from output terminals 44 and 46, respectively.

During the vertical blanking period, the signal input to the input terminal 30.32 is clamped by the clamp circuit 34.36, and then switched by the switch 38.40 for each IH. Switches 38.40, during the horizontal blanking period,
Both are switched to the reference voltage source 42. The output of switch 38 is input to sample and hold circuit 50. The sample and hold circuit 50 receives signals e and f in FIG.
The input signal is sampled at the timing of the output of the AND circuit 52 which takes the logical product of . Differential amplifier 54 compares the output of sample-and-hold circuit 50 and the output voltage of reference voltage source 42, and outputs a voltage indicating the difference. The output of the differential amplifier 54 is fed back to the clamp circuit 34 so that the output of the differential amplifier 54 becomes smaller.

Similarly, the output of the switch 40 is input to a sample and hold circuit 56, and this sample and hold circuit 56 receives the input signal at the timing of the output i of the AND circuit 58 which takes the AND of the signals e and f in FIG. to sample. Differential amplifier 60 compares the output voltage of sample-and-hold circuit 56 and the reference voltage of reference voltage source 42, and outputs a voltage indicating the difference. The output of the differential amplifier 60 is fed back to the clamp circuit 36 so that the output of the differential amplifier 60 becomes smaller.

Further, the output of the switch 40 is output from the sample/hold circuit 6
2 is also input. The sample and hold circuit 62 samples the input signal according to the signal. Differential amplifier 6
4 compares the output voltage of the sample-and-hold circuit 56 and the output voltage of the sample-and-hold circuit 56, and outputs a voltage indicating the difference. If there is an offset level difference between the (R-Y) line and the (B-Y) line at the input terminal 30, there will be a potential difference between the output voltage of the sample-and-hold circuit 56 and the output voltage of the sample-and-hold circuit 62. occurs. Therefore, in order to eliminate the offset level difference, the level control circuit 66 applies a signal to the adder 60, 61 that cancels the offset of the signal input to the clamp circuit 34, 36 according to the output of the differential amplifier 64. do. This level control circuit 66 is controlled by the line switching signal e.
Clamp circuits 34 and 36 to be level controlled, specifically adders 60 and 61, are alternately switched.

Furthermore, in order to cancel out such an offset, for example, the differential amplifiers 54 and 61 can be used instead of the adders 60 and 61.
The output of the level control circuit 66 may be added to the output of 0.

As described above, the clamp potential and offset level are adjusted during the vertical blanking period.

Since the vertical blanking pulse ■ is not input to the AND gate 52.58 outside the vertical blanking period, the sample and hold circuit 50°56.62 does not apply the sampling pulse and stores the state just before that. Holding. Therefore, in a period other than the vertical blanking period, the level control circuit 66
In the embodiment described above, in the case of a still video playback device, color adjustment can be performed by taking advantage of the fact that there is no color difference signal during the blanking period. Ta.

In the above embodiment, processing is performed only on analog signals, but in a playback device that includes a built-in field memory, frame memory, etc., the sample and hold circuits 50, 56 .
6-2 and the level control circuit 66 can be replaced by digital calculations.

That is, the difference between the level of the horizontal blanking period and the level of the signal period can be detected for the A/D converted signal without using a sample and hold circuit. Further, instead of feeding back the level difference to the clamp circuit, numerical calculations of digital values may be performed.

〔Effect of the invention〕

As can be easily understood from the above explanation, according to the present invention, it is possible to suppress variations in the blanking level of reproduced color difference signals, and also to suppress the effects of temperature drift, waveform flaws, etc. during reproduction. I rarely receive it.

[Brief explanation of the drawing]

FIG. 1 is a configuration block diagram of an embodiment of a color difference signal reproducing circuit according to the present invention, FIG. 2 is a circuit diagram of a conventional example, and FIG. 3 is a waveform diagram for explaining FIGS. 1 and 2. . 10.12, 30.32-input terminal 14, 16°34
．． 36-・-clamp circuit tg, 20.38°40-
・-Switch 22, 24. 44, 46-Output terminal 2
6.42... Reference voltage source 50, 56.62...-Sample and hold circuit 52.58-...AND circuit
54, 60. 64-- Differential amplifier 66- Level control circuit

Claims (1)

[Claims] A circuit for reproducing a color difference signal, comprising a detection means for detecting a color difference signal level during a vertical blanking period, a comparison means for comparing a color difference signal level during a signal period with a detection level by the detection means, and a comparison between the comparison means. A color difference signal reproducing circuit comprising: adjustment means for adjusting the blanking level of the color difference signal according to the result.