JPS63179548A - Wiring structure of semiconductor integrated circuit device - Google Patents

Wiring structure of semiconductor integrated circuit device

Info

Publication number
JPS63179548A
JPS63179548A JP1281787A JP1281787A JPS63179548A JP S63179548 A JPS63179548 A JP S63179548A JP 1281787 A JP1281787 A JP 1281787A JP 1281787 A JP1281787 A JP 1281787A JP S63179548 A JPS63179548 A JP S63179548A
Authority
JP
Japan
Prior art keywords
cavities
wiring
insulating film
integrated circuit
wiring films
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1281787A
Other languages
Japanese (ja)
Inventor
Tatsuro Okamoto
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1281787A priority Critical patent/JPS63179548A/en
Publication of JPS63179548A publication Critical patent/JPS63179548A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To decrease capacitance between wirings and stress in an insulating film and to eliminate interference and transmission delay of electric signals, by forming cavities at the parts of an insulating film between conductors.
CONSTITUTION: In an insulating film 4 located between wiring films 3aW3c, cavities 5a and 5b, which have the height approximately equal to the thickness of the wiring films 3aW3c, are formed. The bottom parts of the cavities 5a and 5b are contacted with an insulating film 2 formed on the surface of a substrate 1. The capacitance between the wirings is decreased in comparison with the device, in which only the insulating layer 4 is formed, because of the formation of the cavities 5a and 5b. The cavities 5a and 5b indicate the effect for alleviating stress in the wiring films. This fact contributes to the improvement of the reliability of the wiring.
COPYRIGHT: (C)1988,JPO&Japio
JP1281787A 1987-01-21 1987-01-21 Wiring structure of semiconductor integrated circuit device Pending JPS63179548A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1281787A JPS63179548A (en) 1987-01-21 1987-01-21 Wiring structure of semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1281787A JPS63179548A (en) 1987-01-21 1987-01-21 Wiring structure of semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS63179548A true JPS63179548A (en) 1988-07-23

Family

ID=11815937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1281787A Pending JPS63179548A (en) 1987-01-21 1987-01-21 Wiring structure of semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS63179548A (en)

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02218150A (en) * 1988-12-16 1990-08-30 Internatl Business Mach Corp <Ibm> Method for providing electrical insulating medium between paired superposed members and structure with the medium
US5001079A (en) * 1988-06-29 1991-03-19 Laarhoven Josephus M F G Van Method of manufacturing a semiconductor device by forming insulating side walls with voids below overhangs
JPH03156929A (en) * 1989-11-14 1991-07-04 Mitsubishi Electric Corp Manufacture of semiconductor device
US5444015A (en) * 1992-12-15 1995-08-22 International Business Machines Corporation Larce scale IC personalization method employing air dielectric structure for extended conductors
US5486493A (en) * 1994-02-25 1996-01-23 Jeng; Shin-Puu Planarized multi-level interconnect scheme with embedded low-dielectric constant insulators
US5548159A (en) * 1994-05-27 1996-08-20 Texas Instruments Incorporated Porous insulator for line-to-line capacitance reduction
US5661049A (en) * 1994-02-14 1997-08-26 United Microelectronics Corporation Stress relaxation in dielectric before metallization
US5668398A (en) * 1994-05-27 1997-09-16 Texas Instruments Incorporated Multilevel interconnect structure with air gaps formed between metal leads
US5751066A (en) * 1994-05-27 1998-05-12 Texas Instruments Incorporated Structure with selective gap fill of submicron interconnects
US5759913A (en) * 1996-06-05 1998-06-02 Advanced Micro Devices, Inc. Method of formation of an air gap within a semiconductor dielectric by solvent desorption
US5786624A (en) * 1994-06-07 1998-07-28 Texas Instruments Incorporated Dual masking for selective gap fill of submicron interconnects
US5818111A (en) * 1997-03-21 1998-10-06 Texas Instruments Incorporated Low capacitance interconnect structures in integrated circuits using a stack of low dielectric materials
US5837618A (en) * 1995-06-07 1998-11-17 Advanced Micro Devices, Inc. Uniform nonconformal deposition for forming low dielectric constant insulation between certain conductive lines
US5869379A (en) * 1997-12-08 1999-02-09 Advanced Micro Devices, Inc. Method of forming air gap spacer for high performance MOSFETS'
US5953626A (en) * 1996-06-05 1999-09-14 Advanced Micro Devices, Inc. Dissolvable dielectric method
US6054769A (en) * 1997-01-17 2000-04-25 Texas Instruments Incorporated Low capacitance interconnect structures in integrated circuits having an adhesion and protective overlayer for low dielectric materials
US6160316A (en) * 1998-03-04 2000-12-12 Advanced Micro Devices, Inc. Integrated circuit utilizing an air gap to reduce capacitance between adjacent metal linewidths
US6208015B1 (en) 1996-06-05 2001-03-27 Advanced Micro Devices, Inc. Interlevel dielectric with air gaps to lessen capacitive coupling
US6376330B1 (en) 1996-06-05 2002-04-23 Advanced Micro Devices, Inc. Dielectric having an air gap formed between closely spaced interconnect lines
US6495917B1 (en) * 2000-03-17 2002-12-17 International Business Machines Corporation Method and structure of column interconnect
US7557029B2 (en) 2002-11-15 2009-07-07 Sharp Kabushiki Kaisha Semiconductor device and fabrication process thereof

Cited By (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5001079A (en) * 1988-06-29 1991-03-19 Laarhoven Josephus M F G Van Method of manufacturing a semiconductor device by forming insulating side walls with voids below overhangs
JPH02218150A (en) * 1988-12-16 1990-08-30 Internatl Business Mach Corp <Ibm> Method for providing electrical insulating medium between paired superposed members and structure with the medium
JPH03156929A (en) * 1989-11-14 1991-07-04 Mitsubishi Electric Corp Manufacture of semiconductor device
US5444015A (en) * 1992-12-15 1995-08-22 International Business Machines Corporation Larce scale IC personalization method employing air dielectric structure for extended conductors
US5530290A (en) * 1992-12-15 1996-06-25 International Business Machines Corporation Large scale IC personalization method employing air dielectric structure for extended conductor
US5661049A (en) * 1994-02-14 1997-08-26 United Microelectronics Corporation Stress relaxation in dielectric before metallization
US5486493A (en) * 1994-02-25 1996-01-23 Jeng; Shin-Puu Planarized multi-level interconnect scheme with embedded low-dielectric constant insulators
US5591677A (en) * 1994-02-25 1997-01-07 Texas Instruments Incorporated Planarizeed multi-level interconnect scheme with embedded low-dielectric constant insulators
US5616959A (en) * 1994-02-25 1997-04-01 Texas Instruments Incorporated Planarized multi-level interconnect scheme with embedded low-dielectric constant insulators
US5548159A (en) * 1994-05-27 1996-08-20 Texas Instruments Incorporated Porous insulator for line-to-line capacitance reduction
US5668398A (en) * 1994-05-27 1997-09-16 Texas Instruments Incorporated Multilevel interconnect structure with air gaps formed between metal leads
US5751066A (en) * 1994-05-27 1998-05-12 Texas Instruments Incorporated Structure with selective gap fill of submicron interconnects
US5936295A (en) * 1994-05-27 1999-08-10 Texas Instruments Incorporated Multilevel interconnect structure with air gaps formed between metal leads
US5786624A (en) * 1994-06-07 1998-07-28 Texas Instruments Incorporated Dual masking for selective gap fill of submicron interconnects
US5837618A (en) * 1995-06-07 1998-11-17 Advanced Micro Devices, Inc. Uniform nonconformal deposition for forming low dielectric constant insulation between certain conductive lines
US6091149A (en) * 1996-06-05 2000-07-18 Advanced Micro Devices, Inc. Dissolvable dielectric method and structure
US6376330B1 (en) 1996-06-05 2002-04-23 Advanced Micro Devices, Inc. Dielectric having an air gap formed between closely spaced interconnect lines
US5759913A (en) * 1996-06-05 1998-06-02 Advanced Micro Devices, Inc. Method of formation of an air gap within a semiconductor dielectric by solvent desorption
US5953626A (en) * 1996-06-05 1999-09-14 Advanced Micro Devices, Inc. Dissolvable dielectric method
US6208015B1 (en) 1996-06-05 2001-03-27 Advanced Micro Devices, Inc. Interlevel dielectric with air gaps to lessen capacitive coupling
US6054769A (en) * 1997-01-17 2000-04-25 Texas Instruments Incorporated Low capacitance interconnect structures in integrated circuits having an adhesion and protective overlayer for low dielectric materials
US5818111A (en) * 1997-03-21 1998-10-06 Texas Instruments Incorporated Low capacitance interconnect structures in integrated circuits using a stack of low dielectric materials
US5959337A (en) * 1997-12-08 1999-09-28 Advanced Micro Devices, Inc. Air gap spacer formation for high performance MOSFETs
US5869379A (en) * 1997-12-08 1999-02-09 Advanced Micro Devices, Inc. Method of forming air gap spacer for high performance MOSFETS'
US6160316A (en) * 1998-03-04 2000-12-12 Advanced Micro Devices, Inc. Integrated circuit utilizing an air gap to reduce capacitance between adjacent metal linewidths
US6495917B1 (en) * 2000-03-17 2002-12-17 International Business Machines Corporation Method and structure of column interconnect
US7557029B2 (en) 2002-11-15 2009-07-07 Sharp Kabushiki Kaisha Semiconductor device and fabrication process thereof

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