JPS63178055A - Color image forming apparatus - Google Patents

Abstract

PURPOSE:To easily persuit the cause of image trouble when said trouble is generated, by arranging a pattern generator to the proper point in the circuit of a color image forming apparatus. CONSTITUTION:The bus 108 of CPU is connected to a selector 6 to constitute the first pattern generator which is, in turn, changed over by the port signal 109(S1) of CPU. The signal 111 from a pattern generating circuit (1)7 is connected to a selector 8 as the second pattern generator and changed over by the port signal 113(S2) of CPU. A pattern generating circuit 2(16) is connected as the third pattern generator by a gate 15 and changed over by the port signal (S5)122 of CPU inputted to the gate 14. When a problem is generated in image output, three kinds of the pattern generators mentioned above are successively operated and the place of a cause is cleared.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field] The present invention relates to a color image forming apparatus, and particularly to a color image forming apparatus using digital image data.

[Prior Art] Laser color image forming apparatuses use an electrophotographic process to form images by layering multi-colored toner, and the image forming process is complicated. It was difficult to determine whether this was a problem or a problem with the image forming process. Furthermore, even if there is a problem with the circuit, it is difficult to determine where the problem is.

[Purpose] The present invention has been made in view of the drawbacks of the conventional example, and its purpose is to eliminate image trouble by having a plurality of pattern generators inside the device and arranging the pattern generators at appropriate points in the circuit. It is an object of the present invention to provide a color image forming apparatus that allows easy investigation of the cause when a problem occurs.

[Example] FIG. 1 shows a circuit block diagram of an embodiment of the present invention.

First, this device inputs an 8-bit digital image signal 101 (VDφ~7), a pixel clock 102 (RCLK) synchronized with the image signal, and a horizontal synchronization signal 103 (RHSYNC) as signals from an external device, and uses the flip-flop 1 to After the image signal 101 is once latched by the pixel clock 102, based on the horizontal synchronization signal 103,
Write to memory 2. Here, using memory 2, the pixel clock 106 (VCLK
) and the horizontal synchronizing signal 105 (PHSYNC), the image signal 104 is read out to perform frequency conversion of the image signal.

Here, the horizontal synchronization signal 105 is generated by a laser optical system as shown in FIG. In FIG. 2, a laser beam output from a laser 19 is focused by a collimator lens 20, and is scanned onto a photosensitive drum 23 by a rotating polygon mirror 21 in the direction of an arrow in the figure. A laser beam is guided to the horizontal synchronization signal generation circuit 3 through an optical fiber 22 provided at the starting point of this scan, and converted into an electric signal by a photodetector, thereby generating a horizontal synchronization signal 105 (PHSYNC). Returning to FIG. 1, the pixel clock 106 (VCLK) is generated by dividing the clock generated by the oscillator 4 by the frequency dividing circuit 5 and synchronizing it with the horizontal synchronizing signal 105.

Image data 104, which has been frequency-converted by the memory 2 and synchronized with the laser beam scanning the photoreceptor, is input to the selector 6. The other input of the selector 6 is connected to the CPU lotus 108, which constitutes a first pattern generator, and is switched by a signal 109 (Sl) switched by the CPU board. Therefore, by using CPU data as one image value number and outputting an image with a constant density, or by changing the data at a constant time, it is possible to output a multi-tone image.

Next, the image data 110 output from the selector 6
is input to the selector 8, and the other input is connected to the pattern generation circuit (1) 7 as a second pattern generator.
Connect the signal 111 from the CPU port signal 113
It is switched by (S2). Image data 112 output from the selector 7 is input to the RAM 9.

Here, the RAM 9 is used as a tool for γ correction, that is, gradation correction. In other words, since the sensitivity of the photoreceptor never has a linear relationship with the image data, it is used to correct the image data so that the density of the image data and the image actually obtained are linear. Data in RAM 9 can be read and written from the CPU through a bidirectional buffer IO.

Now, the pattern generating circuit (1) 7 described above has a configuration as shown in FIG. 3, and outputs an image as shown in FIG. 4. In FIG. 3, a counter 24 has a pixel clock 106 (
VCLK), and the counter 27 counts the horizontal synchronizing signal 105 (PHSYNC) in the direction perpendicular to the laser scanning direction (hereinafter referred to as sub-scanning). This pattern generation circuit is used for γ conversion in Figure 1.
I am using AM9, and when outputting this pattern, I temporarily rewrite the contents of RAM to the data I want to output,
The circuit shown in FIG. 3 only controls the address of this RAM. Therefore, in FIG. 4, two timings with an interval of 29.30 in the main scanning direction between the output patterns are output from the counter 24, the OR is performed by the gate 25, and the address to the RAM 9 is counted by the counter 26. .

Also, the interval in the sub-scanning direction of the fourth output pattern is 31.32.
, the counter 27 counts and generates the horizontal synchronizing signal 105, inputs it to the gate 14 in FIG. 1, and directly gates the laser drive signal. Furthermore, in order to turn off the laser for the blank space in the main scanning direction of the output pattern, a gate signal 120 is generated by performing an OR operation using a gate 28 in FIG. With the pattern generation circuit (1) 7 described above, 64 output images as shown in FIG. 4 are obtained, and by changing the data in the RAM 9, 64 color patch outputs, It is possible to obtain a gradation output pattern.

Returning to FIG. 1, the image data 115 output from the RAM 9 is stored in the buffer 11. The signal is input to the binarization circuit 13 through the flip-flop 12. Dithering methods1, PWM conversion methods, etc. are well known as binarization methods1.
In this embodiment, binarization is performed by synchronizing with the pixel clock 106 and performing PWM conversion based on a clock 120 having twice the frequency. The binarized image signal drives a laser diode 18 by a laser drive circuit 17 to form a latent image on the photoreceptor.

Here, a pattern generation circuit (2) 16 as a third pattern generator is connected to the gate 15 without going through the circuit system that has been explained so far.
The image data 123 is set to "L" by the CPU boat signal 55122 input to the pattern generation circuit (2).
An image output can be obtained by directly driving the laser with the pattern signal 124 from the .

A specific example of the pattern generation circuit (2) 16 is shown in FIG.
The timing chart is shown in the figure. In Figure 5,
The horizontal synchronizing signal 105 is counted by the counter 23, and the gates 36 to 41 are output using two outputs, a count output as shown in FIG.
4 types of shift pulse trains such as 128 to 131 are inputted to the selector 42 through the color signals Cφ132, Cr
133 when forming images of Y (yellow), M (magenta), C (cyan), and BK (black), the laser is driven and four color patterns adjacent to each other as shown in Fig. 7 are formed. An image is obtained.

Also, the selectors 34 and 35 output the counter output to the signal 86.
.about.8 to make the width of the output pattern in the sub-scanning direction variable.

Further, a signal 134 (S9
) is a signal for turning off the output of this pattern generation circuit when outputting normal image data.

As mentioned above, by operating the three types of pattern generators in sequence, you can check the gradation, color reproducibility, and registration alignment of the image, and if a problem occurs with image output, it is possible to check the gradation, color reproducibility, and registration alignment of the image. , the location of the cause is clarified.

[Effects of the Invention] As explained above, by having a plurality of pattern generators inside the color image forming apparatus and arranging them at different locations in the circuit, the apparatus can be operated without connecting pattern generators externally. This has the effect that gradation, color reproducibility, and registration alignment can be checked, and if an abnormality occurs in the output image, it becomes easier to find the cause.

[Brief explanation of the drawing]

FIG. 1 is a circuit block diagram from image data processing to laser drive. FIG. 2 is a schematic diagram of the laser optical system, and FIG. 3 is a detailed diagram of the pattern generation circuit (1) 7. FIG. 4 is a diagram showing an example of the output pattern by the pattern generation circuit (1) 7, and FIG. 5 is a detailed diagram of the pattern generation circuit (2) 16. FIG. 6 is a timing chart of the pattern generation circuit (2) 16, and FIG. 7 is a diagram showing an example of the output turn by the pattern generation circuit (2) J, 6. 1; 8-bit flip-flop 2: Frequency conversion memory 3; Horizontal synchronization signal (PHSYNC) generation circuit 4; Oscillator 5; Frequency division circuit 6; 8-bit selector 7: Pattern generation circuit (1) 8; 8-bit selector 9; γ correction RAM 1O: Bidirectional buffer 11; Buffer 12; 8-bit flip-flop 13: Binarization circuit 14, AND gate 15, OR gate 16; Pattern generation circuit (2) 17; Laser drive circuit 18; Laser diode 19: Laser unit 20: Collision Meter lens 21: Rotating polygon mirror 22; Optical fiber 23; Photoconductor drum 24; Counter 25, OR gate 26; Counter 27; Counter 28, OR gate 29. Width in main scanning direction of 64-color pattern: 30.6 Main color pattern Spacing in the scanning direction: 31.6 Width in the sub-scanning direction of a 4-color pattern: 32.6 Spacing in the sub-scanning direction of a 4-color pattern: 3
3; counters 34-35; selectors 36-37; inverters 38-41. AND gate 42: Selector 101; 8-bit image signal 102 from external device; Pixel clock (RCLK) from external device 103; Horizontal synchronization signal (RH3YNC) from external device 104; Image data after frequency conversion 105: of this device Horizontal synchronization signal (R1 (SYNC) 10
6; Pixel clock (VCLK) of this device 107; Oscillator output clock 108, CPU bus data 109; Selector 6 switching signal (Sl) 110; Output image data of selector 6 111: Output data of pattern generation circuit (1) 112; Output image data 113 of selector 8; selector 8 switching signal (S2)
114; γ correction RAM upper address switching signal 11
5; Image data after γ correction 116, CPU bus data 117; Bidirectional buffer switching signal (S3) 118;
Enable signal (S4) for buffer 11 119. Input image data 120 to binarization circuit; pattern generation circuit (
1) Output gate signal 121, PWM conversion clock synchronized with VCLK 122. Gate signal (S5) of the image signal after binarization 123. Image signal after binarization 124: Output of the pattern generation circuit (2) Signal 125; Laser drive signal 126; Count output of N times the horizontal synchronization signal 127: Count output of twice the period of signal 126 128; Laser drive pulse at Y (yellow) +29; M (magenta)
Laser drive pulse 130 at time; Laser drive pulse 1 at C (cyan):]1. Laser drive pulse i32 to 133 at BK (black); color code signal

Claims (1)

[Claims] (1) A color image forming apparatus having an internal pattern generator, which has a plurality of pattern generators in its circuit system and is capable of being connected to a plurality of points in the circuit.