JPS63160897A - Integrated circuit device - Google Patents
Integrated circuit deviceInfo
- Publication number
- JPS63160897A JPS63160897A JP61307637A JP30763786A JPS63160897A JP S63160897 A JPS63160897 A JP S63160897A JP 61307637 A JP61307637 A JP 61307637A JP 30763786 A JP30763786 A JP 30763786A JP S63160897 A JPS63160897 A JP S63160897A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- support base
- circuit device
- circuit elements
- opening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Credit Cards Or The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
[発明の目的]
(産業上の利用分野)
この発明はICカードのような集積回路装置に係り、特
に複数の集積回路素子を同一の支持基体に実装し、それ
らを支持基体上に形成した配線パターンにより相互接続
して構成される集積回路装置に関する。[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) This invention relates to an integrated circuit device such as an IC card, and particularly relates to a method for mounting a plurality of integrated circuit elements on the same support base and mounting them on the same support base. The present invention relates to an integrated circuit device configured by interconnecting wiring patterns formed on a support base.
(従来の技術)
複数の集積回路素子を同一の支持基体に実装するととも
に、それらを相互接続する配線を備えた集積回路装置は
、一般にICモジュールと呼ばれる。ICチップをカー
ド状基体に実装して演算・記憶機能を持たせた、いわゆ
るICカードは、その−例である。(Prior Art) An integrated circuit device in which a plurality of integrated circuit elements are mounted on the same support base and is provided with wiring for interconnecting them is generally called an IC module. An example of this is a so-called IC card, in which an IC chip is mounted on a card-like base to provide calculation and storage functions.
このような装置において、集積回路素子を支持基体の開
口部に配置し、支持基体上にスクリーン印刷等により形
成した配線パターンによって集積回路素子相互間を接続
する技術が提案されている(例えば特願昭59−190
2011号)。これによれば集積回路素子の相互接続に
ワイヤボンディングを用いた場合のようなボンディング
用ワイヤのループハイドが不要となるため、全体の薄型
化が可能となる。In such devices, a technique has been proposed in which integrated circuit elements are placed in openings in a support base and interconnected by wiring patterns formed on the support base by screen printing or the like (for example, in a patent application). Showa 59-190
2011). According to this, there is no need to loop hide bonding wires, which is required when wire bonding is used to interconnect integrated circuit elements, so that the overall thickness can be reduced.
この構造において、集積回路素子の相互接続を確実に行
なうためには、集積回路素子の入出力端子(電極パッド
)の相対位置精度、換言すれば集積回路素子間の相対位
置精度を十分に高くする必要がある。例えば集積回路素
子の入出力端子の電極サイズを100μm口とすれば、
集積回路素子間の相対位置精度を±30μm以内にする
必要がある。In this structure, in order to reliably interconnect the integrated circuit elements, the relative positional accuracy of the input/output terminals (electrode pads) of the integrated circuit elements, in other words, the relative positional accuracy between the integrated circuit elements must be sufficiently high. There is a need. For example, if the electrode size of the input/output terminal of an integrated circuit element is 100 μm,
The relative position accuracy between integrated circuit elements must be within ±30 μm.
この程度の相対位置精度が確保されていないと、配線パ
ターンをスクリーン印刷等で形成する場合、ある集積回
路素子の入出力端子と配線パターンとの位置関係が最適
となるようにマスク合せを行なっても、その集積回路素
子と接続されるべき他の集積回路素子の配線パターンと
の位置関係を正しく合せることは難しい。従って、この
構造の集積回路装置では、3個以上の集積回路素子を実
装して相互接続することは事実上不可能とされていた。If this level of relative positional accuracy is not ensured, when forming wiring patterns by screen printing, etc., masks must be aligned to optimize the positional relationship between the input/output terminals of a certain integrated circuit element and the wiring pattern. However, it is difficult to correctly align the positional relationship between the integrated circuit element and the wiring patterns of other integrated circuit elements to be connected. Therefore, in an integrated circuit device having this structure, it has been virtually impossible to mount and interconnect three or more integrated circuit elements.
(発明が解決しようとする問題点)
このように従来の技術では、複数の集積回路素子を同一
支持基体に実装し配線パターンによって確実に相互接続
することは困難であった。(Problems to be Solved by the Invention) As described above, with the conventional techniques, it is difficult to mount a plurality of integrated circuit elements on the same support base and reliably interconnect them using wiring patterns.
本発明は支持基体に対して集積回路素子を高精度に位置
決めすることができ、集積回路素子の相互間を支持基体
上に形成した配線パターンによって確実に接続すること
が可能な集積回路装置を提供することを目的とする。The present invention provides an integrated circuit device in which integrated circuit elements can be positioned with high precision with respect to a support base, and integrated circuit elements can be reliably connected to each other by wiring patterns formed on the support base. The purpose is to
(問題点を解決するための手段)
本発明は、支持基体の集積回路素子を収容する開口部の
、集積回路素子の入出力端子形成面側に偏移した位置の
側面に接触する位置に位置決め用突起を設けたことを特
徴とする。(Means for Solving the Problems) The present invention provides for positioning the opening portion of the support base for accommodating the integrated circuit device at a position that contacts the side surface of the integrated circuit device at a position shifted toward the input/output terminal forming surface side. It is characterized by having a protrusion for use.
(作用)
集積回路素子は一般にダイシングにより一つのウェーハ
からチップ単位で分離されるが、ダイシングはウェーハ
の厚み方向全体にわたって行なわれず、入出力端子形成
面側から適当な厚さのところまでダイシングした後、押
圧力を加えてチップ単位に切離す方法がとられる関係で
、集積回路素子の入出力端子形成面に近い部分の側面は
ダイシングのため寸法精度が非常に高い。本発明におい
ては、集積回路素子の寸法精度の高い部分の側面を位置
決め用突起に突き当てることで、集積回路素子の位置決
めが高精度になされる。従って、集積回路素子間の相対
位置精度が高くなり、配線パターンによる相互間の接続
が確実に行なわれる。(Function) Integrated circuit elements are generally separated into chips from a single wafer by dicing, but dicing is not performed over the entire thickness of the wafer, but after dicing to an appropriate thickness from the input/output terminal forming surface. Since the integrated circuit element is separated into chips by applying a pressing force, the dimensional accuracy of the side surface of the integrated circuit element near the input/output terminal forming surface is very high due to dicing. In the present invention, the integrated circuit element can be positioned with high precision by abutting the side surface of a portion of the integrated circuit element with high dimensional accuracy against the positioning protrusion. Therefore, the relative positional accuracy between the integrated circuit elements is increased, and the interconnection patterns are reliably connected to each other.
(実施例) 以下、本発明の実施例を図面を参照して説明する。(Example) Embodiments of the present invention will be described below with reference to the drawings.
第1図(a)(b)は本発明の一実施例に係る集積回路
装置の断面図および平面図である。同図において、支持
基体1は例えばステンレスのような金属からなり、集積
回路索子3をそれぞれ収容する複数の開口部2を有する
。集積回路素子3は入出力端子4の形成面を下にして、
この入出力形成面が支持基体1の一方の面と同一平面上
に位置するように、開口部2に挿入されている。FIGS. 1(a) and 1(b) are a sectional view and a plan view of an integrated circuit device according to an embodiment of the present invention. In the figure, a support base 1 is made of metal such as stainless steel, and has a plurality of openings 2 for respectively accommodating integrated circuit cables 3. As shown in FIG. The integrated circuit element 3 is placed with the surface on which the input/output terminals 4 are formed facing down.
It is inserted into the opening 2 so that this input/output forming surface is located on the same plane as one surface of the support base 1.
開口部2は全体としてはほぼ矩形状であるが、集積回路
素子3の入出力端子形成面側に偏移した位置に、この例
では3個の位置決め用突起5a〜5cを有する。すなわ
ち、これら3個の位置決め用突起5a〜5Cのうち、5
a、5bの2個は開口部2の一つの長辺に形成され、残
りの50は5a、5bが形成された辺と隣接する短辺の
一つに形成されている。そして、これらの位置決め用突
起5a〜5Cは、集積回路素子3の入出力端子形成面側
に偏移した位置の側面に接触することによって、集積回
路索子3を支持基体1に対して位置決めする。The opening 2 has a generally rectangular shape as a whole, but has three positioning projections 5a to 5c in this example at positions shifted toward the input/output terminal forming surface of the integrated circuit element 3. That is, among these three positioning protrusions 5a to 5C, 5
Two pieces a and 5b are formed on one long side of the opening 2, and the remaining one 50 is formed on one short side adjacent to the side where 5a and 5b are formed. These positioning protrusions 5a to 5C contact the side surface of the integrated circuit element 3 at a position shifted toward the input/output terminal forming surface side, thereby positioning the integrated circuit cable 3 with respect to the support base 1. .
開口部2内の集積回路素子3の周囲には、硬化性樹脂6
、例えば光硬化性または熱硬化性のウレタン系、アクリ
ル系あるいはエポキシ系の樹脂が充填される。また、集
積回路索子3の入出力形成面およびこれと同一面上の支
持基体1の面上に、入出力端子4が露出するように絶縁
体膜7が形成され、さらにこの絶縁体膜7上に集積回路
素子3の相互間を接続するための配線パターン8が形成
されている。なお、硬化性樹脂6の充填は絶縁体膜7の
形成後に行なってもよい。A curable resin 6 is placed around the integrated circuit element 3 in the opening 2.
For example, it is filled with a photocurable or thermosetting urethane-based, acrylic-based, or epoxy-based resin. Further, an insulating film 7 is formed on the input/output forming surface of the integrated circuit cable 3 and the surface of the supporting base 1 on the same surface so that the input/output terminals 4 are exposed. A wiring pattern 8 for interconnecting the integrated circuit elements 3 is formed thereon. Note that filling of the curable resin 6 may be performed after the insulating film 7 is formed.
絶縁体膜7は例えば感光性ドライフィルム、例えばポリ
メチルメタクリレート樹脂に架橋反応性材料を混合した
もの(ツクトン、バクレル等の商品名で知られている)
を塗布し、それを露光・現像して入出力端子4を露出さ
せる開口を形成したものである。また、硬化性樹脂6を
充填する理由は、感光性ドライフィルムの現像時に開口
部2内の集積回路素子3の周囲に間隙があると、フィル
ムにしわが寄り、絶縁体膜7の表面上に配線パターン8
を形成することが困難となるためである。The insulator film 7 is, for example, a photosensitive dry film, such as a polymethyl methacrylate resin mixed with a cross-linking reactive material (known under trade names such as Tukton and Bakel).
is applied, exposed and developed to form openings that expose the input/output terminals 4. The reason why the curable resin 6 is filled is that if there is a gap around the integrated circuit element 3 in the opening 2 during development of the photosensitive dry film, the film will wrinkle and the wiring on the surface of the insulating film 7 will be formed. pattern 8
This is because it becomes difficult to form.
なお、配線パターン8は例えば厚膜用導体ペーストを用
いてスクリーン印刷により形成される。Note that the wiring pattern 8 is formed by screen printing using, for example, a thick film conductor paste.
第2図は集積回路素子3(ICチップ)を拡大して示す
もので、入出力端子4が形成された面に偏移した領域A
の側面はダイシングされるため寸法精度は非常に高いが
、それ以外の領域Bはダイシングされず押圧力により分
離される部分であるため、寸法精度は極めて低い。本発
明では上記実施例で説明したように、寸法精度の高いA
の領域に位置決め用突起5a〜5Cを当接させて集積回
路素子3の位置決めを行なうため、集積回路索子3を支
持基体1に対して±3μm程度の高い相対位置精度で固
定することができる。これは集積回路素子の相対位置精
度として要求される±30μmを容易に満たす値であり
、従って集積回路索子3の相互間を配線パターン8によ
って確実に接続することが可能である。FIG. 2 shows an enlarged view of the integrated circuit element 3 (IC chip), and shows an area A shifted to the surface where the input/output terminals 4 are formed.
Since the side surfaces of the area B are diced, the dimensional accuracy is very high, but the other area B is not diced and is separated by pressing force, so the dimensional accuracy is extremely low. In the present invention, as explained in the above embodiment, A with high dimensional accuracy
Since the integrated circuit element 3 is positioned by bringing the positioning protrusions 5a to 5C into contact with the regions, the integrated circuit cable 3 can be fixed to the support base 1 with a high relative positional accuracy of approximately ±3 μm. . This is a value that easily satisfies ±30 μm required as relative positional accuracy of integrated circuit elements, and therefore it is possible to reliably connect the integrated circuit cables 3 to each other by the wiring pattern 8.
なお、上記実施例で説明した支持基体1は例えば第3図
に示すように、第1の板11とこれより薄い第2の板1
2とを重ねて一体化した構造であり、第2の板12の開
口部2に位置決め用突起58〜5Cが形成されている。Note that the support base 1 explained in the above embodiment includes a first plate 11 and a thinner second plate 1, as shown in FIG. 3, for example.
2 are stacked and integrated, and positioning protrusions 58 to 5C are formed in the opening 2 of the second plate 12.
位置決め用突起5a〜5Cは十分に精度よく形成する必
要があるが、これにはエツチングを用いて開口部2を形
成すればよい。第1および第2の板11.12は例えば
ステンレス製で、第2の板12は30〜lOOμm程度
の薄い板である。このような薄い板12にエツチングに
より位置決め用突起5a〜5cを形成することは容易で
ある。位置決め用突起5a〜5cが形成された第2の板
12が、例えばスポット溶接、シームウェルド、接着剤
、半田のいずれかによって第1の板11に接着固定され
、支持基体1が構成される。なお、支持基体1は金属製
でなく、例えば樹脂製であっても構わない。The positioning protrusions 5a to 5C must be formed with sufficient precision, and the openings 2 may be formed by etching. The first and second plates 11, 12 are made of stainless steel, for example, and the second plate 12 is a thin plate of about 30 to 100 μm. It is easy to form the positioning projections 5a to 5c on such a thin plate 12 by etching. The second plate 12 on which the positioning protrusions 5a to 5c are formed is adhesively fixed to the first plate 11 by, for example, spot welding, seam welding, adhesive, or solder, thereby forming the support base 1. Note that the supporting base 1 may be made of resin instead of metal, for example.
[発明の効果]
この発明によれば、支持基体の開口部の、集積回路素子
の入出力端子形成面側に偏移した位置の側面に接触する
位置に位置決め用突起を形成して、集積回路素子の位置
決めを行なうことによって、同一の支持基体に集積回路
素子を極めて高い相対位置精度をもって支持固定した上
で、支持基体上に形成した配線パターンによって相互間
を確実に接続することができる。従って、この発明では
配線パターンによって集積回路素子の相互接続を直接行
なう構造において、従来困難とされていた3個以上の集
積回路素子の実装も可能となる。これによってICカー
ドのようなICモジュールの機能向上に寄与することが
できる。[Effects of the Invention] According to the present invention, the positioning protrusion is formed at a position that contacts the side surface of the opening of the support base at a position shifted toward the input/output terminal forming surface of the integrated circuit element, and the integrated circuit By positioning the elements, it is possible to support and fix the integrated circuit elements on the same support base with extremely high relative positional accuracy, and then reliably connect them to each other using the wiring pattern formed on the support base. Therefore, in the present invention, in a structure in which integrated circuit elements are directly interconnected by wiring patterns, it becomes possible to mount three or more integrated circuit elements, which was previously considered difficult. This can contribute to improving the functionality of IC modules such as IC cards.
第1図(a)(b)は本発明の一実施例に係る集積回路
装置の断面図および正面図、第2図は集積回路素子の側
面形状を説明するための図、第3図は同実施例における
支持基体を詳細に示す分解斜視図である。
1・・・支持基体、2・・・開口部、3・・・集積回路
素子、4・・・入出力端子、5a〜5C・・・位置決め
用突起、6・・・硬化性樹脂、7・・・絶縁体膜、8・
・・配線パターン、11・・・第1の板、12・・・第
2の板。1(a) and 1(b) are a sectional view and a front view of an integrated circuit device according to an embodiment of the present invention, FIG. 2 is a diagram for explaining the side shape of an integrated circuit element, and FIG. 3 is the same. FIG. 3 is an exploded perspective view showing details of a support base in an example. DESCRIPTION OF SYMBOLS 1... Support base, 2... Opening, 3... Integrated circuit element, 4... Input/output terminal, 5a-5C... Positioning protrusion, 6... Curing resin, 7...・Insulator film, 8・
... Wiring pattern, 11... First board, 12... Second board.
Claims (4)
た開口部にそれぞれ配置し、支持基体上に形成した平面
配線パターンにより集積回路素子相互間を接続してなる
集積回路装置において、前記支持基体の開口部は集積回
路素子の入出力端子形成面側に偏移した位置の側面に接
触する位置に位置決め用突起を有することを特徴とする
集積回路装置。(1) In an integrated circuit device in which a plurality of integrated circuit elements are arranged in openings formed in the same support base, and the integrated circuit elements are connected to each other by a planar wiring pattern formed on the support base, An integrated circuit device characterized in that the opening of the support base has a positioning protrusion at a position that contacts a side surface of the integrated circuit element at a position shifted toward the input/output terminal forming surface.
れ、それらのうちの2個は同一辺に、他の1個はこれに
隣接する他の辺に設けられていることを特徴とする特許
請求の範囲第1項記載の集積回路装置。(2) Three positioning protrusions are provided for one opening, two of which are provided on the same side, and the other one is provided on another side adjacent to this. An integrated circuit device according to claim 1.
一体化した構造であり、第2の板に位置決め用突起が形
成されていることを特徴とする特許請求の範囲第1項記
載の集積回路装置。(3) The base body has a structure in which a first plate and a thinner second plate are stacked and integrated, and a positioning protrusion is formed on the second plate. The integrated circuit device according to item 1.
れていることを特徴とする特許請求の範囲第1項記載の
集積回路装置。(4) The integrated circuit device according to claim 1, wherein a curable resin is filled around the integrated circuit element in the opening.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61307637A JPS63160897A (en) | 1986-12-25 | 1986-12-25 | Integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61307637A JPS63160897A (en) | 1986-12-25 | 1986-12-25 | Integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63160897A true JPS63160897A (en) | 1988-07-04 |
Family
ID=17971433
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61307637A Pending JPS63160897A (en) | 1986-12-25 | 1986-12-25 | Integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63160897A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9746380B2 (en) | 2011-09-30 | 2017-08-29 | Segan Industries, Inc. | Advanced multi-element consumable-disposable products |
| US10570294B2 (en) | 2013-03-15 | 2020-02-25 | Segan Industries, Inc. | Compounds for reducing background color in color change compositions |
-
1986
- 1986-12-25 JP JP61307637A patent/JPS63160897A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9746380B2 (en) | 2011-09-30 | 2017-08-29 | Segan Industries, Inc. | Advanced multi-element consumable-disposable products |
| US10570294B2 (en) | 2013-03-15 | 2020-02-25 | Segan Industries, Inc. | Compounds for reducing background color in color change compositions |
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