JPS63155742A - Manufacture of semiconductor element - Google Patents

Manufacture of semiconductor element

Info

Publication number
JPS63155742A
JPS63155742A JP30178986A JP30178986A JPS63155742A JP S63155742 A JPS63155742 A JP S63155742A JP 30178986 A JP30178986 A JP 30178986A JP 30178986 A JP30178986 A JP 30178986A JP S63155742 A JPS63155742 A JP S63155742A
Authority
JP
Japan
Prior art keywords
tungsten silicide
sih4
film
increase
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30178986A
Other languages
Japanese (ja)
Inventor
Akihiro Sakamoto
明広 坂元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP30178986A priority Critical patent/JPS63155742A/en
Publication of JPS63155742A publication Critical patent/JPS63155742A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form an excellent tungsten silicide film on a base having a step by setting a forming temperature to 390-430 deg.C in an LPCVD method using WF6 and SiH4 as source gas. CONSTITUTION:When a polycrystalline silicon film 14 is formed by an LPCVD method on a substrate 11 having steps of oxide films 12, 13, phosphorus is thermally diffused with POCl3 as source gas, and then a tungsten silicide film 15 is formed at the forming temperature of 390 deg.C or higher by an LPCVD method in which WF6 and SiH4 are used as source gases, the film 15 has high density even at the step. However, since the forming temperature becomes high, the thermal decomposition of the SiH4 becomes vigorous. Since the resistivity is increased at the time of forming the tungsten silicide as compared with the time at 360 deg.C, the increase of the resistivity can be suppressed by reducing the flow rate of the SiH4 in the amount that the reaction of the SiH4 gas becomes vigorous. As a result, the increase in the wiring resistance due to an abnormal oxidation of the step or a disconnection in an oxidizing step is eliminated, thereby realizing a semiconductor element having excellent electric characteristics.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は半導体素子の製造方法に係シ、特に電極や配
線材料として用いられるタングステンシリサイドの形成
方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming tungsten silicide used as an electrode or wiring material.

(従来の技術) 従来、LPGVD装置でタングステンシリサイドを形成
する場合、形成温度を360℃としたプロセスが一般的
となっている。それは、セミコンダクp −r7− A
/ Y (Sem1conductor World 
) 1985−9p83−88の図3に示されているよ
うに、380’C近辺よシ上では反応系の5iHa  
反応が支配的になるため、タングステンシリサイド9の
シリコン成分が増大し、抵抗率が増大してしまうからで
ある。
(Prior Art) Conventionally, when forming tungsten silicide using an LPGVD apparatus, a process in which the formation temperature is 360° C. is common. It is Semiconductor p-r7-A
/ Y (Sem1conductor World
) As shown in Figure 3 of 1985-9 p83-88, 5iHa of the reaction system is
This is because the reaction becomes dominant and the silicon component of the tungsten silicide 9 increases, resulting in an increase in resistivity.

したがって、低抵抗材料を形成することを目的として、
360°Cの形成温度が最も一般的となった。
Therefore, with the aim of forming a low resistance material,
Formation temperatures of 360°C have become the most common.

(発明が解決しようとする問題点) しかし、上記従来の360℃で形成する方法においては
、第3図に示すように、段差を有する下地1上にタング
ステンシリサイド@2を形成すると、段差部で膜の密度
が小さい領域3が発生する問題点があった。そして、こ
のように低密度領域3が発生すると、第4図に示すよう
にタングステンシリサイド膜2上に酸化膜(例えばイオ
ン注入時のマスクとして使用される)5を形成する際に
、前記低密度領域3が異常に酸化され、配線抵抗の増大
や甚だしい場合には断線に至るという問題点があった。
(Problems to be Solved by the Invention) However, in the conventional method of forming at 360° C., as shown in FIG. There is a problem in that a region 3 where the film density is low occurs. When the low-density region 3 is generated in this way, when forming the oxide film 5 (for example, used as a mask during ion implantation) on the tungsten silicide film 2, as shown in FIG. There is a problem in that the region 3 is abnormally oxidized, leading to an increase in wiring resistance and, in extreme cases, to disconnection.

この発明は上記の点に鑑みなされたもので、段差を有す
る下地上にも、良質の酸化プロセスにも充分耐え得る優
れたタングステンシリサイド膜を形成できるタングステ
ンシリサイド形成法を有する半導体素子の製造方法を提
供することを目的とする。
This invention was made in view of the above points, and provides a method for manufacturing a semiconductor device using a tungsten silicide formation method that can form an excellent tungsten silicide film that can withstand high-quality oxidation processes even on a substrate with steps. The purpose is to provide.

(問題点を解決するだめの手段) この発明は、WFaとSiH4をソースガスに用いるL
PCVD法でタングステンシリサイドを形成する方法に
おいて、形成温度を390〜430°Cとするものであ
る。
(Another Means to Solve the Problem) This invention is based on an LSI using WFa and SiH4 as source gas.
In a method of forming tungsten silicide by PCVD, the formation temperature is 390 to 430°C.

(作 用) 形成温度を390〜430℃にすると、段差部でも密度
の大きなタングステンシリサイドが形成される。しかし
、400℃付近のプロセスでは、従来技術の説明の項で
も述べたように、360℃の時よシも抵抗率の増加があ
るが、Si:F(4ガスの反応が活発になる分だけ、S
 iH4流量を減らしてやることによシ容易に抵抗率の
増加は抑えられる。
(Function) When the formation temperature is set to 390 to 430°C, tungsten silicide with a high density is formed even in the step portion. However, in the process at around 400°C, as mentioned in the explanation of the prior art, there is an increase in resistivity compared to when the temperature is 360°C. , S
The increase in resistivity can be easily suppressed by reducing the iH4 flow rate.

そして、前記のように段差部でも密度が太きくなった結
果、酸化プロセスが追加されても、配線抵抗の増大や断
線が生じることはない。
As a result of the increased density even in the stepped portions as described above, even if an oxidation process is added, no increase in wiring resistance or disconnection will occur.

(実施例) μ下この発明の一実施例を第1図を参照して説明する。(Example) An embodiment of the present invention will now be described with reference to FIG.

第1図(a)は、シリコン基板ll上に1000〜50
00Aの酸化膜12を熱酸化によシ形成し、レソストを
用いた通常のホトリン法でライン・アンド・ス被−スを
有するように異方性エツチングを行い、再度、シリコン
基板11が露出した部分に熱酸化によシ酸化膜13を1
00〜500人形成したものである。
In Figure 1(a), 1000 to 50
An oxide film 12 of 00A was formed by thermal oxidation, and anisotropic etching was performed using a normal photolithography method using a photoresist so as to have line and space coverage, and the silicon substrate 11 was exposed again. An oxide film 13 is formed on the part by thermal oxidation.
It was created by 00 to 500 people.

このようにして酸化膜12.13の段差を有する基板l
l上にLPCVD法で多結晶シリコン膜14を500〜
3000A形成し、それにPOC13a  をソースガ
スにしてリンを1〜5 E 2Q cm−3熱拡散する
(第1図(b))。
In this way, the substrate l having the steps of the oxide films 12 and 13 is
A polycrystalline silicon film 14 with a thickness of 500~
3000A is formed, and 1 to 5 E 2 Q cm -3 of phosphorus is thermally diffused therein using POC13a as a source gas (FIG. 1(b)).

しかる後、酸化膜12.13による段差が反映した前記
多結晶シリコン膜14上に、WF’6とSiH。
Thereafter, WF'6 and SiH are deposited on the polycrystalline silicon film 14 reflecting the step difference caused by the oxide films 12 and 13.

をソースガスとしたLPCVD法によシ、390℃以上
の形成温度でタングステンシリサイド膜15を2000
〜3000A形成する(第1図(C))。この時、形成
温度を390℃以上とすることによシ、タングステンシ
リサイド膜15は段差部においても密度が高くなる。な
お、形成温度を390℃以上とすれば、段差部でも密度
を高くできるという効果を充分に得られるが、形成温度
が高温になる程、5in4  の熱分解が活発になシ、
WFsとの反応が安定せず、膜厚、組成(SiとWの比
)共に再現性の良いタングステンシリサイド膜15が得
られない。したがって、400℃付近で(390〜43
0℃)で形成するが最適と考えられる。
The tungsten silicide film 15 is formed at a temperature of 2,000° C. or higher using the LPCVD method using as a source gas.
~3000A is formed (Fig. 1(C)). At this time, by setting the formation temperature to 390° C. or higher, the density of the tungsten silicide film 15 is increased even in the step portion. Note that if the forming temperature is 390°C or higher, the effect of increasing the density even in the step part can be sufficiently obtained, but the higher the forming temperature, the more active the thermal decomposition of 5in4 becomes.
The reaction with WFs is not stable, and a tungsten silicide film 15 with good reproducibility in both film thickness and composition (ratio of Si and W) cannot be obtained. Therefore, at around 400℃ (390 to 43
0°C) is considered optimal.

以上のように、上記の方法によれば、段差部においても
密度の高いタングステンシリサイド膜15が得られた。
As described above, according to the above method, a tungsten silicide film 15 with high density was obtained even in the step portion.

したがって、その後、酸化工程が存在しても、配線抵抗
の増大や断線が生じることは防止される。
Therefore, even if there is an oxidation step thereafter, an increase in wiring resistance and disconnection are prevented.

第2図は、下地に段差を有したものと、フラットのもの
にそれぞれタングステンシリサイド[全250OA形成
した後に、950℃ドライ02  雰囲気で30分間酸
化した時の単位面積当シの配線抵抗の比(段差有り/フ
ラット)を360℃と400℃の形成温度で比較して示
す。ただし、タングステンシリサイド膜の組成(Si/
W)  ハ、360℃では2.42 、2.70を、4
00℃では2.51 、2.75であるものを用いてい
る。この図よシ、形成温度を400℃とすれば、形成温
度360℃よシ段差を有する場合における配線抵抗の増
大が抑えられていることが分る。
Figure 2 shows the ratio of wiring resistance per unit area when tungsten silicide was formed on the base with steps and on the flat base, respectively. A comparison of formation temperatures of 360°C and 400°C is shown. However, the composition of the tungsten silicide film (Si/
W) C, at 360℃, 2.42, 2.70, 4
At 00°C, those having values of 2.51 and 2.75 are used. This figure shows that when the formation temperature is 400.degree. C., the increase in wiring resistance in the case where there is a step difference is suppressed when the formation temperature is 360.degree.

なお、400℃付近のプロセスでは、従来技術の説明の
項でも述べたように、タングステンシリサイドそのもの
の形成時に、360℃の時よりも抵抗率の増加があるが
、5in4  ガスの反応が活発になる分だけ、s u
i4  流量を減らしてやることによって容易に抵抗率
の増加を抑えることができる。
In addition, in the process at around 400°C, as mentioned in the explanation of the prior art, when forming the tungsten silicide itself, the resistivity increases compared to the process at 360°C, but the reaction of the 5in4 gas becomes more active. Minutes, s u
i4 The increase in resistivity can be easily suppressed by reducing the flow rate.

(発明の効果) 以上詳述したように、この発明の方法によれば、段差部
におけるタングステンシリサイド膜の低密度化が抑えら
れ、酸化工程で、段差部が異常酸化を起して配線抵抗が
増大したフ断線に至ることが無くなり、電気特性の優れ
た半導体素子の実現が可能となる。
(Effects of the Invention) As detailed above, according to the method of the present invention, the density reduction of the tungsten silicide film at the step portion is suppressed, and the step portion undergoes abnormal oxidation during the oxidation process, resulting in an increase in wiring resistance. This eliminates the occurrence of increased disconnection, making it possible to realize a semiconductor element with excellent electrical characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の半導体素子の製造方法の一実施例を
示す工程断面図、第2図は段差を有する下地とフラット
の下地上にタングステンシリサイド膜を形成した場合の
配線抵抗の比を2つの形成温度で示す特性図、第3図お
よび第4図は従来の問題点を説明するための従来素子の
断面図である。 11・・・シリコン基板、12.13・・・酸化膜、]
4・・・多結晶シリコン膜、15・・・タングステンシ
リサイド膜。 イX弘す5系キの断d口6り 第3図
FIG. 1 is a process cross-sectional view showing an embodiment of the method for manufacturing a semiconductor device of the present invention, and FIG. 2 shows the ratio of wiring resistance when a tungsten silicide film is formed on a base with steps and a flat base. Characteristic diagrams shown at different forming temperatures, FIGS. 3 and 4 are cross-sectional views of conventional elements for explaining the problems of the conventional elements. 11...Silicon substrate, 12.13...Oxide film,]
4... Polycrystalline silicon film, 15... Tungsten silicide film. Figure 3

Claims (1)

【特許請求の範囲】  タングステンシリサイド形成工程を有する半導体素子
の製造方法において、 タングステンシリサイドは、WF_6とSiH_4をソ
ースガスに用いるLPCVD法で、形成温度を390〜
430℃として形成することを特徴とする半導体素子の
製造方法。
[Claims] In a method for manufacturing a semiconductor device that includes a tungsten silicide forming step, tungsten silicide is formed by a LPCVD method using WF_6 and SiH_4 as source gases at a temperature of 390 to 390°C.
A method for manufacturing a semiconductor device, characterized in that it is formed at a temperature of 430°C.
JP30178986A 1986-12-19 1986-12-19 Manufacture of semiconductor element Pending JPS63155742A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30178986A JPS63155742A (en) 1986-12-19 1986-12-19 Manufacture of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30178986A JPS63155742A (en) 1986-12-19 1986-12-19 Manufacture of semiconductor element

Publications (1)

Publication Number Publication Date
JPS63155742A true JPS63155742A (en) 1988-06-28

Family

ID=17901195

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30178986A Pending JPS63155742A (en) 1986-12-19 1986-12-19 Manufacture of semiconductor element

Country Status (1)

Country Link
JP (1) JPS63155742A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09116115A (en) * 1995-06-26 1997-05-02 Hyundai Electron Ind Co Ltd Manufacture of capacitor for semiconductor element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09116115A (en) * 1995-06-26 1997-05-02 Hyundai Electron Ind Co Ltd Manufacture of capacitor for semiconductor element

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