JPS6315444A - Manufacture of infrared light-emitting diode - Google Patents

Abstract

PURPOSE:To obtain an extremely flat P-N junction, and to remove the possibility of a thyristor waveform by adding a trace quantity of Al into a Ga solution for liquid-phase epitaxial growth for forming the P-N junction. CONSTITUTION:Aluminum is added into a gallium solution used in an epitaxial growth method as a P-N junction forming means at a weight ratio of 0.05% or less. An N-type epitaxial layer in 45mum and a P-type epitaxial layer in 70mum are shaped at a temperature-drop rate of 1.5 deg.C/min at a growth start temperature of 920 deg.C by employing a substrate such as an Si doped GaAs single crystal substrate having impurity concentration of 5X10<17>cm<-3> and thickness of 350mum and by using a solution in which a GaAs polycrystal of 1.5g, Si of 25mg and Al of 0.1-0.2mg per Ga of 10g are added. Accordingly, the epitaxial growth layers having the excellent flatness of a junction is acquired.

Description

[Detailed Description of the Invention] [Industrial Field of Application] Light emitting diodes have advantages such as long life, low power consumption, and high speed, so they have been used in various fields in recent years, and have been used in various displays, home appliances, etc. It is widely used as a light emitting source for remote control devices, optical coupling devices, etc. The present invention relates to an infrared light emitting diode among the above light emitting diodes, and particularly relates to a gallium arsenide (hereinafter referred to as GaAs) infrared light emitting diode doped with silicon (hereinafter referred to as 81) as an impurity.

[Conventional technology]

Si-doped GaAs infrared light emitting diodes are N-type GaAs
A GaAs polycrystal and a Ga solution containing 81 as an impurity are brought into contact with the S substrate, and an N-type epitaxial layer and a P-type epitaxial layer are formed on the high temperature side by slow cooling using the property that Si is an amphoteric impurity in GaAs. It can be easily formed sequentially and continuously with the epitaxial layer, and furthermore, 5
The impurity level contributing to the light emission in iOGaAs is quite deep (acceptor level ~ o, xeV), relatively little reabsorption in the crystal, and high efficiency makes it the most widely produced.

[Problem that the invention seeks to solve]

However, in the conventional SI doped (J a As epitaxial growth method) described above, an inversion occurs from the N-type epitaxial layer on the high-temperature side to the P-type epitaxial layer on the low-temperature side (approximately 870°C, although it also depends on the As pressure). A phenomenon thought to be caused by slight temperature fluctuations in the Ga solution is that the bond is not flat but appears wavy.

In particularly severe cases, as shown in Figure 3, a state where the KN layer enters the P layer region can be seen, and in places where such regions are widely distributed, after configuring the front and back electrodes, individual pellets are It has a drawback that it may exhibit a P-N-P-N thyristor waveform when subjected to a certain pressure. In addition, S
The general structure of an I-doped GaAs infrared light emitting diode is shown in FIG.

Furthermore, in the conventional technology, when etching is performed using a known hydrofluoric acid-based stain etching solution, there are many cases in which it is thought that unevenness in the K Si concentration near the busy junction occurs in addition to the above-mentioned defects, making it difficult to determine the exact location of the junction. It also had the disadvantage of being difficult to observe.

[Means for solving problems]

The method of manufacturing a Si-doped ()aAs infrared light emitting diode according to the present invention includes adding aluminum (hereinafter referred to as Afi) to a gallium solution used in an epitaxial growth method as a means for forming a PN junction.

〔Example〕

Next, the present invention will be explained based on examples.

Impurity cuff degree 5 x 1017 gong-3, thickness 350μm
Using a St-doped Oa A S single crystal substrate of
GaAS polycrystalline 1.59 per IH, Si 25+r
Using a solution containing 2 ng of +g%kflQ, l~Q, growth start temperature was 920°C, N
Type epitaxial layer 45 μm 1P type epitaxial/
j was formed to be 70 μm.

Thereafter, the epitaxial wafer was folded and etched with a hydrofluoric acid stain etching solution, and the cross section was observed. As a result, an epitaxially grown layer with excellent flatness of the bond was obtained as shown in FIG.

Next, polish the substrate side of this shrimp wafer to a thickness of 200 mm.
After forming micrometers, we formed front and back electrodes using a predetermined method, cut them into individual pellets by scribing 400μ7FLX400μm, and measured the light emission output and voltage-current characteristics. there were.

Furthermore, it was found that even when VCAI was added in an amount of 0.05 to 0.1, a bond with excellent planarity was obtained, and that a good epitaxial growth layer was obtained by adding Part A.

〔Effect of the invention〕

As explained above, the present invention makes it possible to obtain an extremely flat PN junction by adding HL to a Ga solution for liquid phase epitaxial growth for forming a PN junction, thereby reducing silicon risk. This has the effect of eliminating the danger of waveforms.

Regarding the principle of the present invention, it is thought that aluminum enters the Ga solution, smoothing the growth in the lateral direction and eliminating fluctuations in the growth rate in the thickness direction, but it is not clear at present. However, the effects of the present invention have been confirmed with good reproducibility in terms of phenomena.

[Brief explanation of the drawing]

Fig. 1 is a cross-sectional view of the S1-doped GaAs infrared light emitting diode epitaxial wafer according to the present invention, in which the inter-fold surfaces have been subjected to stain etching to clearly show each layer. FIG. 3 is a cross-sectional view showing the general structure of an external light-emitting diode pellet. FIG. 3 is a cross-sectional view in which the inter-fold surfaces of an epitaxially grown wafer are subjected to stain etching to clarify each layer according to the prior art. Agent Patent Attorney Uchihara 1 day

Claims (1)

[Claims] Manufacture of an infrared light emitting diode characterized in that when forming a PN junction by liquid phase epitaxial growth using silicon as an impurity, aluminum is added to a gallium melt for epitaxial growth at a weight ratio of 0.05% or less to gallium. Method.