JPS63146675A - Signal processing unit for video signal - Google Patents

Signal processing unit for video signal

Info

Publication number
JPS63146675A
JPS63146675A JP29406686A JP29406686A JPS63146675A JP S63146675 A JPS63146675 A JP S63146675A JP 29406686 A JP29406686 A JP 29406686A JP 29406686 A JP29406686 A JP 29406686A JP S63146675 A JPS63146675 A JP S63146675A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
level
signal
data
circuit
video signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29406686A
Inventor
Shigeru Awamoto
Tatsuji Sakauchi
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Abstract

PURPOSE: To correct nonlinear distortion, gain fluctuation and DC fluctuation of a recording and reproducing device automatically by inserting a reference signal to a part of a video signal string at recording and recording the result, and correcting the level of a reproduced video signal so that the level reproduced reference signal is equal to the level of the reference signal at reproduction.
CONSTITUTION: A ramp signal converting the level from the black to the white level in one horizontal scanning period as a reference signal is inserted in a video signal and recorded. A reproduced video signal digitized by an A/D conversion circuit 1 is extracted of a reproduced ramp signal data by a gate circuit 2 and the S/N is improved by a data processing circuit 3. Then the result is sent to a level correction table generating circuit 5. The level correction table completed by the circuit 5 is stored in a storage circuit A6. In putting a reproduced video signal data to an address of the storage circuit A6, the address data corresponding to the level of the signal data is outputted. The storage circuit B7 stores an original ramp signal data inserted at recording by using an address data as the address, and in receiving the address data from the storage circuit A6 an original ramp signal data corresponding thereto is ouputted.
COPYRIGHT: (C)1988,JPO&Japio
JP29406686A 1986-12-10 1986-12-10 Signal processing unit for video signal Pending JPS63146675A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29406686A JPS63146675A (en) 1986-12-10 1986-12-10 Signal processing unit for video signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29406686A JPS63146675A (en) 1986-12-10 1986-12-10 Signal processing unit for video signal

Publications (1)

Publication Number Publication Date
JPS63146675A true true JPS63146675A (en) 1988-06-18

Family

ID=17802842

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29406686A Pending JPS63146675A (en) 1986-12-10 1986-12-10 Signal processing unit for video signal

Country Status (1)

Country Link
JP (1) JPS63146675A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0414556A2 (en) * 1989-08-23 1991-02-27 Sharp Kabushiki Kaisha Compensating circuit for compensating distortion of video signal by detecting distortion of ramp signal in video signal
JPH04304087A (en) * 1991-03-29 1992-10-27 Victor Co Of Japan Ltd Waveform equalization system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0414556A2 (en) * 1989-08-23 1991-02-27 Sharp Kabushiki Kaisha Compensating circuit for compensating distortion of video signal by detecting distortion of ramp signal in video signal
JPH04304087A (en) * 1991-03-29 1992-10-27 Victor Co Of Japan Ltd Waveform equalization system

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