JPS63142842U - - Google Patents

Info

Publication number
JPS63142842U
JPS63142842U JP3501387U JP3501387U JPS63142842U JP S63142842 U JPS63142842 U JP S63142842U JP 3501387 U JP3501387 U JP 3501387U JP 3501387 U JP3501387 U JP 3501387U JP S63142842 U JPS63142842 U JP S63142842U
Authority
JP
Japan
Prior art keywords
signal line
array
wired
negative
affirmative
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3501387U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3501387U priority Critical patent/JPS63142842U/ja
Publication of JPS63142842U publication Critical patent/JPS63142842U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP3501387U 1987-03-10 1987-03-10 Pending JPS63142842U (US07534539-20090519-C00280.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3501387U JPS63142842U (US07534539-20090519-C00280.png) 1987-03-10 1987-03-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3501387U JPS63142842U (US07534539-20090519-C00280.png) 1987-03-10 1987-03-10

Publications (1)

Publication Number Publication Date
JPS63142842U true JPS63142842U (US07534539-20090519-C00280.png) 1988-09-20

Family

ID=30844112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3501387U Pending JPS63142842U (US07534539-20090519-C00280.png) 1987-03-10 1987-03-10

Country Status (1)

Country Link
JP (1) JPS63142842U (US07534539-20090519-C00280.png)

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