JPS63133273A - Processing system for synthesis of logic circuit diagram - Google Patents

Abstract

PURPOSE:To simplify the control of an output drawing as well as a function tracing job by outputting plural logic circuit diagrams after synthesizing them. CONSTITUTION:The drawing names to be synthesized to the same drawing an the layout order are designated from a terminal equipment 3 by a command. This command is stored temporarily in a synthetic drawing name designating command storing area 14 and a retrieving/extracting means 15 is started. Then the information on the designated drawing is retrieved out of an external memory file 4 based on the command stored in the area 14 and stored successively in a synthetic drawing information storing area 16. Then a drawing synthesizing means 17 is started and the drawing information is read successively out of the area 16. Thus a drawing image is produced before the synthesization processing and stored in a pre-synthesization area of a logic circuit diagram image storing area 18 to undergo synthesizing processing. This synthesized drawing image is stored in an after-synthesization area of the area 18.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method for processing logic circuit diagrams using a computer system, and particularly to a method for synthesizing logic circuit diagrams that are outputs of logic design results of digital processing devices. Regarding.

[Conventional technology]

In conventional logic circuit diagram processing methods such as CAD using a computer system, one drawing is defined when logic circuit diagram information is input into the computer system, and it is output after various processing is performed within the computer system. The drawings used here also output a logic circuit diagram for one screen defined at the time of input onto, for example, one sheet of paper or one screen of a display device.

[Problem that the invention seeks to solve]

In this way, in the conventional logic circuit diagram processing method, the output drawing is output in units of one screen defined at the time of input.
Nowadays, the density of digital processing equipment, etc. used for logical design has become noticeably higher, and a huge amount of drawings are being output, making it complicated to manage the output drawings. However, since the information density of one drawing is low, it is very difficult to trace its functions using design drawings.

Therefore, an object of the present invention is to
The purpose of this invention is to facilitate management of output drawings and functional tracing by composing and outputting logic circuit diagrams that have been output in units of drawings multiple times.

[Means for solving problems]

In order to achieve the above object, the present invention includes a drawing information storage means for accumulating a plurality of pieces of drawing information each corresponding to a screen name, and a drawing information storage means for selecting a corresponding drawing from the drawing information storage means in response to an input of a screen name to be synthesized. a search and extraction means for searching and extracting information; a drawing information storage means for a composite drawing for storing drawing information extracted by the search and extraction means; A composite drawing generation means for generating a composite drawing in which inter-drawing connection information that can be connected within the composite drawing is replaced with a wiring pattern diagram among the inter-drawing connection information included in the drawing information; and a composite drawing generated by the composite drawing generation means. and a drawing output device that outputs.

[Effect]

When the name of the screen to be synthesized is input, the corresponding drawing information is searched and extracted from the drawing information storage means that stores a plurality of drawing information by the search extraction means and stored in the drawing information storage means of the composite drawing, and then the corresponding drawing information is searched and extracted from the drawing information storage means of the composite drawing. A composite drawing is generated in which the inter-drawing connection information that can be connected within the composite drawing is replaced with a wiring pattern diagram among the inter-drawing connection information included in the drawing information, and the composite drawing is output by the drawing output device.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a computer system to which the logic circuit diagram synthesis processing method of the present invention is applied.
, a terminal device 3 having a display and a keyboard, and an external storage file 4 provided in a magnetic disk device, etc.
and a screen output device 5 such as an electrostatic block, an XY plotter, and a CRT display. The processing device 1 also includes a drawing information manual means 10, a drawing information storage area 11, a classification storage means 12, a command manual means 13, a composite drawing name designation command storage area 14, and a search extraction means 15. , drawing information storage area 16 for composite drawings
, a drawing synthesis means 17 , a logic circuit diagram image storage area 18 , and a drawing output means 19 , each of the above areas 1
1.14.16.18 is provided in the main memory of the computer, for example.

Manual input of drawing information to the computer is performed using the automatic screen input device 2 or the keyboard of the terminal device 3. FIG. 2 is an explanatory diagram of drawing information that is input, and each drawing information includes information such as what kind of logical blocks a''-z are included in each diagram, which logical blocks are connected to each time, etc. Interesting diagram information to indicate Y/a + G/z + E
/ v + B / j, D / p + E /
r + D / Q + to / C, C / n + P / LF / X
+G/a, J/b, X/c, A/f + E/u
, B/h, E/s, ^/e, B/ni, A/b,
B/g.

D/p, C#! As shown in FIG. 2, each drawing includes inter-drawing connection information that indicates which logical blocks in other drawings the logical blocks a to z in each drawing are connected to.

When drawing information as described above is input from the automatic screen input device 2 or the terminal device 3, it is inputted to the drawing information input means 1.
0, it is temporarily stored in the drawing information storage area 11, and the classification storage means 12 is activated.

Note that when inputting drawing information, one drawing is defined as in the conventional case.

When activated, the classification storage means 12 classifies the drawing information stored in the drawing information storage area 11 into inter-drawing connection information and other drawing information, and stores them in the external storage file 4.

Next, when the operator specifies any screen name and arrangement order to be combined in the same drawing from the terminal device 3 using a command,
The command is the composite drawing name specification command storage area 14
, and the search/extraction means 15 is activated. For convenience of explanation, for example, as shown in FIG. 3,
Assume that an instruction is given to combine four drawings with screen names A, B, D, and E into one drawing in an arrangement as shown in the drawing.

When the search and extraction means 15 is activated, it searches for the screen name A designated as the target of the composite drawing from the drawing information already stored in the external storage file 4 in accordance with the command stored in the composite screen name designation command storage area 14. , B, D, and H, and the drawing information storage area 1 of the composite drawing is searched.
6 sequentially.

When the search and extraction process by the search and extraction means 15 is completed, the drawing synthesis means 17 is activated.
7, when activated, first sequentially reads out each drawing information stored in the drawing information storage area 16 of the composite drawing, and creates a drawing image of each drawing before compositing processing as shown in FIG. 4 based on the internal information axis of the drawing. is generated and stored in the pre-synthesis area of the logic circuit diagram image storage area 18. This process is the same as the conventional process except that the process is performed for a plurality of drawings.

Then, after generating the drawing image before compositing processing as shown in FIG. It is determined whether or not the drawing specified in the composite drawing is included, and if it is included, the drawing indirect branch information is replaced with a connection pattern diagram in the same drawing. That is, processing is performed to place a connection pattern such as a solid line between logical blocks to be connected, and if the drawing to be connected is not included in the composite drawing, it is left as is as indirect drawing branch information in the composite drawing as well. Then, the image of the synthesized logic circuit diagram subjected to the synthesis process in this way is stored in the synthesis post-processing area of the logic circuit diagram image storage area 18.

FIG. 5 shows an example of a drawing image after the compositing process in which the image in FIG. 4 is processed by the drawing compositing means 17. When screen name B is to be synthesized, logical block C and logical block j are combined as shown in FIG.
are connected by a wiring pattern diagram shown by a solid line, and if the destination drawing is not included in the composite drawing, as in drawing indirect branch information Y/a, the drawing indirect branch information Y/a is left as is.

When the above-described compositing process by the drawing compositing means 17 is completed,
The drawing output means 19 is activated, and the drawing output means 19 outputs the high-density logic circuit diagram as shown in FIG. 5 stored in the post-synthesis area of the logic circuit image storage area 18 to the drawing output device. 5 to output on one sheet of paper or one screen. At this time, when an output instruction specifying a single screen name is given to the drawing output means 19 from the terminal device 3, the drawing output means 19 outputs the corresponding information stored in the pre-synthesis area of the logic circuit image storage area 18. Output the logic circuit diagram to the drawing output bag W5. Therefore, depending on the purpose of the drawing, a logic circuit diagram before synthesis can be output in place of a logic circuit diagram after synthesis, as in the past.

〔Effect of the invention〕

As explained above, according to the present invention, even if one screen is defined at the time of inputting drawing information, that is, even if a conventional drawing information input method is used, the screen to be synthesized when generating a logic circuit diagram, etc. By specifying the name and arrangement order, multiple drawings that you want to combine can be combined and output on one sheet of paper or one screen, and the drawing indirect branch information between the drawings to be combined is stored in the connection pattern. Since it is replaced and output, 1
This has the effect of making it possible to easily obtain high-density logic circuit diagrams with several times higher drawing density per sheet than in the past. Therefore, designers can easily trace functions using logic circuit diagrams, improving the efficiency of design work and maintenance work, and the number of drawings can be reduced to a fraction of what was previously possible, making drawing management easier. This makes it possible to significantly reduce management man-hours and storage costs.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a computer system that uses the logic circuit diagram synthesis processing method of the present invention, FIG. 2 is a diagram showing an example of input screen information, FIG. 3 is a diagram showing an example of specifying a synthesis screen name, and FIG. FIG. 4 is a diagram showing a drawing image before compositing processing, and FIG. 5 is a diagram showing a drawing image after compositing processing. In the figure, 1... processing device, 2... automatic screen input device, 3... terminal device, 4... external storage file,
5... Drawing output device, 10... Drawing information input means,
11... Drawing information storage area, 12... Classification storage means, 13... Command input means, 14... Composite drawing name designation command storage area, 15... Search extraction means,
16...Drawing information storage area of composite drawing, 17...
Drawing synthesis means, 18...Logic circuit diagram image storage area, 19... Drawing output means.

Claims (1)

[Scope of Claims] Drawing information storage means for accumulating a plurality of pieces of drawing information each corresponding to a drawing name; and in response to input of a name of a drawing to be synthesized, searching and extracting the corresponding drawing information from the drawing information storage means. a search and extraction means for storing the drawing information extracted by the search and extraction means; a drawing information storage means for a composite drawing that stores the drawing information extracted by the search and extraction means; A composite drawing generation means for generating a composite drawing in which inter-drawing connection information that can be connected within the composite drawing is replaced with a wiring pattern diagram among the inter-drawing connection information; and a drawing output for outputting the composite drawing generated by the composite drawing generation means. 1. A logic circuit diagram synthesis processing method, characterized by comprising a device.