Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/02—Bonding areas ; Manufacturing methods related thereto
  • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
  • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/02—Bonding areas ; Manufacturing methods related thereto
  • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
  • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/02—Bonding areas; Manufacturing methods related thereto
  • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
  • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
  • H01L2224/0554—External layer
  • H01L2224/0555—Shape
  • H01L2224/05552—Shape in top view
  • H01L2224/05553—Shape in top view being rectangular
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/02—Bonding areas; Manufacturing methods related thereto
  • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
  • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
  • H01L2224/0554—External layer
  • H01L2224/0555—Shape
  • H01L2224/05552—Shape in top view
  • H01L2224/05554—Shape in top view being square
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
  • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
  • H01L2224/491—Disposition
  • H01L2224/4912—Layout
  • H01L2224/49175—Parallel arrangements

Landscapes

• Engineering & Computer Science (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Wire Bonding (AREA)

Priority Applications (1)

Applications Claiming Priority (1)

Publications (1)

Family

ID=31127495

Family Applications (1)

Country Status (1)

• 1985
  • 1985-11-25 JP JP1985182052U patent/JPS6289157U/ja active Pending

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