JPS6288375A - Monolithic light emitting diode array - Google Patents

Abstract

PURPOSE:To enhance light emitting efficiency, by taking out a current conducting wiring from the central part of a light emitting diode part to an electrode region, which is formed at a position that is in parallel with the light emitting diode part, forming the light emitting surface of each light emitting diode part in a U-shape, reducing the area of the current conducting wiring, which is formed on a P-N junction layer, and making the amount of light emission with respect to the current large. CONSTITUTION:A current conducting wiring 36, which is connected to an electrode part 29 of an N-type Ga1-yAlyAs layer 23 is taken out to an individual negative electrode 26. The electrode part 29 is located at the central part of a light emitting diode 30. The area occupied by the current conducting wire on the light emitting diode part 30 is made as small as possible. Therefore, the light emitting area of the light emitting diode part 30 is made large and the shape of the light emitting surface is of a U-shape.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a monolithic light emitting diode array having a common electrode on the back side of a semiconductor chip and a plurality of individual electrodes on the front side.

[Prior Art] Conventionally, monolithic light emitting diodes have a structure in which impurities are diffused into an epitaxial growth layer grown on a single crystal substrate.

FIG. 3 is a top view of a conventional monolithic light emitting diode array, and FIG. 4 is a perspective view of a cross section taken along line A-Am in FIG.

In the figure, 1 is an n-type QaAs substrate, 2 and 3 are an epitaxially grown n-type GaAs 1-XPX layer and an n-type (3aAS layer), respectively. 4 and 5 are n-type GaAs
A p-type head region formed by selectively diffusing Zn from the surface of the S layer 3, 4 is a luminescent recombination part, and 5 is an isolation stripe of each light emitting diode section consisting of each luminescent recombiner part 4. be. Reference numeral 6 designates an individual positive electrode for electricity supply provided on the electrode portion 9 of the n-type GaAS layer 3 of each light emitting diode portion, and 7 represents a negative electrode common to each light emitting diode portion provided on the back surface of the n-type GaAS substrate. .

When a positive bias is applied between the positive electrode 6 and the negative electrode 7, electrons from the n-type Ga As 1-x P The light from the individual positive electrode 6 and the n-type GaAS
The light is emitted to the outside as shown by arrow C through the light extraction hole 8 provided at @3.

[Problems to be Solved by the Invention] However, because the conventional diffused light emitting diode array has the above-mentioned configuration, the problem is that the light emitting area is small compared to the pn junction area, and the amount of light emitted with respect to the current is small. was there.

In order to solve this problem, it is easy to think of enlarging the light extraction hole 8, but in order to do so, the outline part of the electrode 6 that forms the light extraction hole 8 becomes thinner, and if that part becomes disconnected, etc. , a new problem arises in that the amount of light emitted relative to the current decreases significantly.

[Object of the invention] The object of the present invention is to solve the problems of the prior art described above,
It is an object of the present invention to provide a monolithic light emitting diode array in which the light emitting diode portion has a large light emitting area and high light emitting efficiency.

[Means for Solving the Problems] That is, the gist of the present invention is that at least one mixed crystal epitaxial layer is grown on a GaAS substrate so that a p-n junction is formed, and the p-n junction is Orthogonal mesas
In a monolithic light emitting diode array that is divided into a plurality of island-shaped light emitting diode parts lined up in a row by etching grooves, a power supply wiring is formed from the center of the light emitting diode part in a position parallel to the light emitting diode part. The light emitting surface of each light emitting diode portion is U-shaped.

[Example] Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 shows a top view of a mesa-type monolithic light emitting diode array of the present invention, and FIG. 2 shows a perspective view taken along the line B--B in FIG. 1.

In the figure, 21 is a P-type GaAS substrate, 22 is an epitaxially grown n-type Ga1-xAf is appropriately determined depending on the desired emission wavelength. 2
3 is an n-type Ga1-V Affl VASEi epitaxially grown on the n-type Ga1-xAf7xAS layer 22.
By making this mixed crystal ratio y higher than the above-mentioned mixed crystal ratio X, the light transmittance for the emission wavelength from the p-type Ga 1. AJl
yAf! This is aimed at increasing the injection efficiency of electrons from the layer 23 and confining minority carriers injected into the n-type Ga1-xAfXAS layer 22.

36 is n-type Ga1. This is a current-carrying wiring connected to the electrode portion 29 of the Δ1yAS layer 23, and is drawn out to the individual negative electrode 26. Note that the energizing wiring 36 and the individual negative electrodes 26 are formed of a vapor-deposited metal film.

The electrode section 29 is located at the center of the light emitting diode section 30, and is designed to minimize the area occupied by the current supply wiring on the light emitting diode section 30. Therefore, the light emitting area of the light emitting diode section 30 is large, and the shape of the light emitting surface is U-shaped.

24 is an n-type Ga1.2 other than the individual negative electrode 26 and the electrode portion 29. This is a phosphorus silicate glass (PSG) film provided to insulate from the AfflyAs layer 23.

25 is a mesa etching groove, 25a is an etching groove in the reverse mesa direction, and 25b is an etching groove in the forward mesa direction, each of which is provided to isolate each light emitting diode section 30.

Note that etching grooves in the reverse mesa direction must be provided between adjacent light emitting diode sections 30, and etching grooves in the forward mesa direction must be provided so as to traverse the device.

Therefore, since each individual negative electrode 26 is drawn out from the electrode portion 29 by passing over the etching groove 25b in the forward mesa direction, there is no possibility of breakage and disconnection at the edge of the mesa.

Reference numeral 27 denotes a common positive electrode formed by depositing a metal film on the entire surface of the back surface of the p-type GaAs substrate 21.

In this structure, by applying a voltage between the individual negative electrodes 26 and the common positive electrode 27, the light emitting diode section 30
If a forward current is applied to the n-type Ga1-V A f y
Electrons from A 3 layer 23 become n-type Ga1-, A-elephant XAS layer 2
21 is injected to cause radiative recombination, and light is emitted upward from the 79, or U-shaped, light emitting surface.

Note that the reason why the individual negative electrodes 26 are U-shaped at the lead-out portion is to facilitate wire bonding.

Example 1 A carrier concentration of 5 was formed by liquid phase epitaxial growth on the (100) surface of a 350 μm thick P-type GaASI plate doped with Zn and having a carrier concentration of 2 x 101 aCm-3.
X 1016cm' p-type Ga o, 9AI! ,0.1
AS layer 20 μm and carrier S degree 2 x 1017
cm-3 n-type Gao, 7Δffl □, and 3ASII were sequentially grown to 3 μm.

This surface is mesa-etched to create two etched grooves in the <OTl> direction that run in the forward mesa direction relative to the (100) plane.
In addition, an etching groove in the <011> direction, which is a reverse mesa direction perpendicular to the OTl> direction, was provided between the two forward mesa etching grooves. Therefore, these mesa-etched grooves form the /S''r light-emitting diode portions aligned in a row in the <OTl> direction.The depth of each mesa-etched groove is 5 μm, and the light emitting portion is width 4
It was set as 5 μm x 70 μm.

Next, a PSG film was grown to a thickness of 0.2 μm so as to cover the entire surface, and then the PSG film on the electrode portion from the center of the light emitting diode portion was removed in an area of 5 μTn×10 μm using hydrofluoric acid.

On the PSG film on both sides of the light emitting diode part, gold-germanium alloy/nickel/gold metal is placed as a conductive wiring to be drawn out from the electrode part of each light emitting diode part through the etched groove in the forward mesa direction to the individual negative electrode. The films were deposited to a thickness of 0.1 μm and 10.2 μm, respectively.
Set it to 0.5 μm.

A gold-zinc/nickel/gold metal film having a thickness of 0.1 μm, 10.2 μm, and 10.5 μm, respectively, was deposited as a common positive electrode on the entire back surface of the substrate. The light emitting surface is U-shaped, and the area where light emission is suppressed by the current-carrying metal wiring is 1.
0μm x 30μm, which reduces the light emitting area by 3 compared to conventional
I was able to double it.

The light emitting diode sections were formed at a rate of 16 per #, and 128 light emitting diode sections could be formed in a 1.6 x 8M chip.

The rising voltage of this mesa-type monolithic light emitting diode array is 1.5V, and the forward voltage is 2.5V. The OV was 10 mA or more, the reverse breakdown voltage was 7 V or more, and the emission wavelength was 800#.

In addition, since the metal film is deposited on the etching in the forward mesa direction, no breakage occurs, and it is possible to obtain a mesa-type monolithic light emitting diode that does not break even after 2000 hours of use with a yield of 100%. Ta.

As described above, in the embodiment of the present invention, the light emitting area can be increased compared to the conventional technology, the light emitting efficiency can be increased, and there is less variation in the characteristics of each light emitting diode section 30. It is.

In the above embodiment, p-type GaAS was used as the substrate crystal, but it is also possible to use n-type GaAS, and n-type GaAS
When As is used, the common electrode side may be used as a negative electrode, and the individual electrode side may be used as a positive electrode.

In addition, the mixed crystal system formed on the GaAS substrate is also GaAff.
The material is not limited to lAs, and other mixed crystal systems may be used.

[Effects of the Invention] As explained above, the mesa type monolithic light emitting diode array of the present invention can increase the amount of light emitted with respect to current by reducing the area of the current carrying wiring formed on the pn junction layer. In addition, the luminous efficiency can be increased,
Furthermore, a remarkable effect is achieved in that variations in the light emitting characteristics of each light emitting diode section can be reduced.

[Brief explanation of drawings]

FIG. 1 is a top view showing an embodiment of the present invention, FIG. 2 is a perspective view 1 taken along the line B-B' in FIG. 1, FIG. 3 is a top view showing a conventional example, and FIG. It is a perspective view of the AA- cross section in . '1 ・N-type GaAS substrate. 2 ・N-type GaAs1-xPx layer. 3-n-type GaAS layer. 4... Luminescence recombination part. 5...Isolation stripe. 6...Individual positive electrode. 7... Common negative electrode. 8...Light extraction hole. 9.29... Electrode part. 21 ・D-type GaAS substrate. 22 ・F) type Ga1-x AJl, xAS layer. 23-n-type Ga1-, to A! , yAS'ifA. 24...PSG film. 25... Mesa etching groove. 26...Individual negative electrode. 27...Common positive electrode. 30...Light emitting diode section,'' 36...Wiring for energizing.

Claims (1)

[Claims] (1) At least one mixed crystal epitaxial layer is grown on the GaAs substrate so that a p-n junction is formed,
In a monolithic light-emitting diode array in which the p-n junction surface is divided into a plurality of island-shaped light-emitting diode parts arranged in a row by mutually orthogonal mesa etching grooves,
Electrical wiring is drawn out from the center of the light emitting diode part to an electrode area formed in a position parallel to the light emitting diode part, so that the light emitting surface of each light emitting diode part is U-shaped. A monolithic light emitting diode array characterized by: