JPS6276622A - Method and device for reduced projection-type alignment - Google Patents

Abstract

PURPOSE: To remove the decrease in alignment accuracy due to the resist coat ing irregularity by a method wherein the position of an alignment pattern is detected with the single color illumination light with the same wavelength as the wavelength of white illumination light and alignment illumination light, and the difference in the both position detecting signals is obtained so as to compensate the amount of the alignment.

CONSTITUTION: An alignment pattern detection error between the white and single color is detected on a few chips on a wafer with a subpattern detection system. Then, a vertual origin (x_s, y_s) where the error is minimum is obtained on the basis of the error data. An alignment pattern detection error e_x* (x. y) e_y* (x, y) is analogized on an arbitrary position, that is to say, on all the chip, and the data is stored in a memory. The center position x_a of the wafer alignment pattern, ideally, under the white illumination light with higher accuracy by using the amount of the detected error e_x* (x, y) that has been obtained and stored and providing compensation to it. An amount of the alignment is obtained from the center position x_a of the compensated wafer alignment pattern and the center position x_r of the reticle alignment pattern so as to move the stage in the direction of x a few.

COPYRIGHT: (C)1987,JPO&Japio