JPS6271927U - - Google Patents
Info
- Publication number
- JPS6271927U JPS6271927U JP16377585U JP16377585U JPS6271927U JP S6271927 U JPS6271927 U JP S6271927U JP 16377585 U JP16377585 U JP 16377585U JP 16377585 U JP16377585 U JP 16377585U JP S6271927 U JPS6271927 U JP S6271927U
- Authority
- JP
- Japan
- Prior art keywords
- error
- circuit
- output
- stage
- shift register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Detection And Prevention Of Errors In Transmission (AREA)
- Alarm Systems (AREA)
Description
第１図は本考案の実施例構成ブロツク図。第２
図は本考案の別の実施例構成ブロツク図。第３図
は従来例の構成ブロツク図。
１……誤りパルス計数回路、２……警報発出回
路、３……発振回路、４……フリツプフロツプ、
５……トリガパルス回路、１１，１２，１３，２
１，２２，２３……シフトレジスタ。
FIG. 1 is a block diagram of an embodiment of the present invention. Second
The figure is a block diagram of another embodiment of the present invention. FIG. 3 is a block diagram of a conventional example. 1...Error pulse counting circuit, 2...Alarm issuing circuit, 3...Oscillation circuit, 4...Flip-flop,
5...Trigger pulse circuit, 11, 12, 13, 2
1, 22, 23...Shift register.
Claims (1)
上の誤りパルスを計数すると、その状態を変化さ
せるＫ段のシフトレジスタを含む誤りパルス計数
回路１と、 この誤りパルス計数回路の出力状態を記憶し、
Ｎ（正の整数）回連続して前記誤りパルス計数回
路の出力が変化したとき、警報パルスを送出する
警報発出回路２と、 周期Ｔのパルスを発生する発振回路３と を備えた誤り警報回路において、 前記発振回路の出力パルスをクロツク入力とし
前記誤りパルス計数回路の各段のシフトレジスタ
を初期状態にする出力パルスを送出するフリツプ
フロツプ回路４を 備えたことを特徴とする誤り警報回路。 (2) フリツプフロツプ回路４は、誤りパルス計
数回路のシフトレジスタの第一段目の出力をセツ
ト入力とし、その出力を誤りパルス計数回路の各
段のシフトレジスタのリセツト端子に入力する構
成である実用新案登録請求の範囲第(1)項に記載
の誤り警報回路。 (3) フリツプフロツプ回路４は、誤りパルス計
数回路のシフトレジスタの第一段目の出力をリセ
ツト入力とし、その反転出力を誤りパルス計数回
路の各段のシフトレジスタのリセツト端子に入力
する構成である実用新案登録請求の範囲第(1)項
に記載の誤り警報回路。[Claims for Utility Model Registration] (1) An error pulse counting circuit 1 including a K-stage shift register that counts error pulses and changes its state when K (positive integer) or more error pulses are counted. , memorize the output state of this error pulse counting circuit,
An error alarm circuit comprising: an alarm generation circuit 2 that transmits an alarm pulse when the output of the error pulse counting circuit changes N (positive integer) times in succession; and an oscillation circuit 3 that generates a pulse with a period T. An error alarm circuit according to claim 1, further comprising a flip-flop circuit 4 which receives the output pulse of the oscillation circuit as a clock input and sends out an output pulse that initializes each stage of the shift register of the error pulse counting circuit. (2) The flip-flop circuit 4 has a configuration in which the output of the first stage of the shift register of the error pulse counting circuit is used as a set input, and the output thereof is input to the reset terminal of the shift register of each stage of the error pulse counting circuit. An error alarm circuit according to claim (1) of patent registration. (3) The flip-flop circuit 4 has a configuration in which the output of the first stage of the shift register of the error pulse counting circuit is used as a reset input, and its inverted output is input to the reset terminal of the shift register of each stage of the error pulse counting circuit. An error alarm circuit according to claim (1) of the utility model registration.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16377585U JPH042505Y2 (en) | 1985-10-25 | 1985-10-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16377585U JPH042505Y2 (en) | 1985-10-25 | 1985-10-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6271927U true JPS6271927U (en) | 1987-05-08 |
| JPH042505Y2 JPH042505Y2 (en) | 1992-01-28 |
Family
ID=31092282
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16377585U Expired JPH042505Y2 (en) | 1985-10-25 | 1985-10-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH042505Y2 (en) |
-
1985
- 1985-10-25 JP JP16377585U patent/JPH042505Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH042505Y2 (en) | 1992-01-28 |