JPS6265584A - Chrominance signal processing circuit - Google Patents

Abstract

PURPOSE:To obtain a chrominance signal processing circuit capable of low speed operation and having a fewer number of elements by inputting the output signal of a comb-line filter to which a reproducing low-pass conversion chrominance signal is inputted to a frequency conversion circuit and outputting the chrominance signal of original band. CONSTITUTION:The comb-line filter 33 consists of a 90 deg. phase shifter 22, a 1H delay circuit 23 and an adder 24, and a frequency conversion circuit 34 consists of a 90 deg. phase shifter 25, a delay circuit 26, multipliers 27 and 28 and an adder 29. The reproducing low-pass conversion chrominance signal inputted from a terminal 24, after the elimination of the crosstalk component from a adjacent track at the comb-line filter 33, is restored to an original chrominance component at the frequency conversion circuit 34, then being outputted to a terminal 30. Thus, since the comb-line filter 33 is arranged at the preceding stage side of the nultipliers 27 and 28 in a frequency conversion circuit 34, a band area is low at the part of the comb-line filter 33, thereby reducing operation speed, and also reducing the number of the elements in the 1H delay circuit 23.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Substances of the Invention] The present invention relates to a color signal processing circuit for a video tape recorder (VTR), and more particularly to a digital signal processing circuit thereof.

[Technical background of the invention]

A reproduced color signal processing circuit in a VTR is generally constructed as shown in FIG.

- To briefly explain the operation of this circuit, the low frequency converted color signal (e.g. output at 688) reproduced from the tape (1) via the rotating magnetic head (2) is sent to a multiplier (in this case, a balanced modulator). (3) is converted into the original 3.58 MHz color signal. In the band pass filter (BPF) (4), this 3.
A 58 MHz color signal is extracted and input to the first stage comb filter. The comb filter is composed of a 1H delay line (5) and an adder (6), and removes crosstalk components from adjacent tracks during reproduction. Note that (power) is a conversion signal (eg, 4.27MH) input terminal, and (8) is a color signal output terminal.

FIG. 4 shows an example in which the analog circuit shown in FIG. 3 is converted into a digital circuit. (9) in the figure is a frequency conversion circuit.

It is an α-comb filter. The frequency conversion circuit (9) is a Hartley type, and this type outputs only one side wave (upper side wave or lower side wave), so the BPF (
4) is unnecessary, and the band characteristics are better than when the circuit shown in FIG. 3 is directly digitized. Note that (9M) is a delay circuit, (9b) is a 90° phase shifter, and (9C) and (9d) are multipliers.

(9C) is an adder, (101) is a 1H delay circuit, (
10b) is an adder. It is also an input terminal for the aυ and α conversion signals.

[Problems with background technology]

In the circuit shown in Figure 4, the third
There is an advantage that a 1H delay circuit (10) corresponding to the 1H delay line (5) in the figure can be accommodated in an IC (integrated circuit).

However, the multiplier (9C) of the frequency conversion circuit (9)
, (9d), there is a problem in that a higher frequency band requires a higher frequency and higher speed operation is required. In addition, the 1H delay circuit of the comb filter Ql (
10a) also had the disadvantage of increasing the number of elements used.

[Purpose of the invention]

The present invention has been made in view of the above-mentioned points, and it is an object of the present invention to provide a color signal processing circuit that can operate at a lower speed and requires fewer elements when implemented as an IC.

[Summary of the invention]

In the present invention, a reproduced low frequency converted color signal is input to a comb filter, the output signal of this comb filter is input to a frequency conversion circuit, and the frequency conversion circuit outputs a color signal of the original band. It is.

[Embodiments of the invention]

FIG. 1 is a block diagram showing an embodiment of a color signal processing circuit according to the present invention.

Qυ is an input terminal (2
) is a 90° phase shifter, 2 is a 1H delay circuit, (F) is an adder, (C) is a 90° phase shifter, (E) is a delay circuit, @, (
(to) is a multiplier, (to) is an adder, (to) is 3.58 M
The color of Hz (No. 1 is the output terminal. One input terminal Gυ of the 1st multiplier Cθ, @ is 4.27
MHz No. 13 is input. Here, a 90' phase shifter (
2), a 1H delay circuit (to), and an adder 014) constitute a comb filter (c), and a 9o0 phase shifter (c),
A frequency conversion circuit (b) is composed of delay circuits (to) 9, multipliers (5), (to), and adders.

Next, the operation of the color signal processing circuit will be explained.

The reproduced low-frequency conversion color signal inputted from the input terminal Qυ is passed through a comb filter (to) to remove the p-stoke component from the adjacent track. By the way, suppose this filter fH is the horizontal synchronization frequency.

The relationship is fou=(n±-L) x fH. On the other hand, a comb filter configured as shown in FIG. 3 passes signals of the following frequencies.

f=mxfH Therefore, it is necessary to shift the passing frequency of the comb filter by a frequency of -7'H. Therefore, as shown in Figure 1, 90
° Phase shifter (Hilbert transformer) @ is used.

The output that has passed through the comb filter is input to the frequency conversion circuit 04), converted into the original 3.58 M1lz color signal, and outputted from the output terminal CIJ. As mentioned above, this frequency conversion circuit (2) is known as a Hartley modulator, and also requires a 900 phase shifter (c). However, in this case, only the upper side wave or the lower side wave is output, so the conventional BPF (4) as shown in Figure 3
is not necessary.

According to this embodiment, the multiplier (5
Since the comb filter (to) is placed before the ) and @, the band of this comb filter 03 is low and the operation speed can be reduced. In addition, the 1H delay circuit (
c) The number of elements can be reduced.

Next, another embodiment of the present invention is shown in FIG. In this embodiment, two 90' phase shifters were required in the above embodiment, but only one is required by combining the 90' phase shifters. First, its configuration will be explained. (c) is an input terminal into which the reproduced low frequency conversion color signal is input, and (to) is a 1H delay circuit.

(B) is a delay circuit, (to) is 90@phase shifter, OI is an adder, 8Wl to SW3 are switches, (4G, f41
), (6) are holding registers.

(c), (441 is a multiplier, (451 is an adder, (
4f9 is a 3.58 color signal output terminal. Also,
417) 11 is an input terminal for a conversion signal.

Next, the operation of the above circuit will be briefly explained.

In this case, switches SWI, SW2. This embodiment differs from the previous embodiment in that the 90° phase shifter (to) is time-divisionally used for both the comb filter and the frequency conversion circuit by switching swa. That is, the switches 8W1 . SW2. swa is terminal a
The connection state is switched to the terminal side, open, open, and in the next period, the connection state is switched to the terminal side, closed, closed. As a result, the 90° phase shifter (up to) is used in both the comb filter and the same wave number conversion circuit, and the number of 90° phase shifters can be reduced by one.

〔Effect of the invention〕

As described above, the present invention provides a digital color signal processing circuit which does not have a high operating speed and can reduce the number of elements in a comb-shaped filter. can.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of a color signal processing circuit according to the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIG. 3 is a block diagram showing a conventional analog color signal processing circuit. Block Diagram FIG. 4 is a block diagram showing an example of a color signal processing circuit obtained by digitizing the circuit of FIG. 3. n, 25...90° phase shifter, feather...1H delay circuit. Sae, 29...Adder, 26...Delay circuit. 4.28... Multiplier, 33... Comb filter. Ah...frequency conversion circuit.

Claims (1)

[Claims] 90° phase shifter and 1H into which reproduced low frequency conversion color signal is input
A comb filter consisting of a delay circuit and an adder that adds the outputs of these, a 90° phase shifter to which the output signal of this comb filter is input, a delay circuit, and a multiplier connected to their output terminals, respectively. and an adder that adds the outputs of these multipliers.