JPS625851A - Manufacture of ceramic multilayer substrate - Google Patents

Manufacture of ceramic multilayer substrate

Info

Publication number
JPS625851A
JPS625851A JP14559085A JP14559085A JPS625851A JP S625851 A JPS625851 A JP S625851A JP 14559085 A JP14559085 A JP 14559085A JP 14559085 A JP14559085 A JP 14559085A JP S625851 A JPS625851 A JP S625851A
Authority
JP
Japan
Prior art keywords
ceramic multilayer
multilayer substrate
ceramic
sintering
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14559085A
Other languages
Japanese (ja)
Inventor
藤作 実
治 牧野
俊雄 津田
徹 石田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP14559085A priority Critical patent/JPS625851A/en
Publication of JPS625851A publication Critical patent/JPS625851A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ラジオ、テレビなどの民生用電子機器やコン
ピュータ、通信機器などを構成する電子回路氷板用とし
て利用されるセラばツク多層基板の製造方法に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to the production of ceramic multilayer substrates used for electronic circuit ice plates constituting consumer electronic equipment such as radios and televisions, computers, communication equipment, etc. It is about the method.

従来の技術 近年、電子機器を小型、薄型化を図るための手enh 
 +  +  1rII     L参々向n)4−、
−、+−aI声4’ffk    b’o升麓9いわゆ
るチップ部品が開発され、実用に供されτいる。また、
それらの部品が搭載されるべく5回路基板についても小
型、薄型が要求され、それらを達成すべく種々の手段が
提案され、実用化されつつある。回路基板に対して、課
せられる小型化要求は、主として、配線密度を高めるた
めの方策であり、一つはファインライン(細線)形成化
技術であり、もう一つは多層化技術である。特に多層化
技術の実現は基板単位面積当りの搭載部品点数、いわゆ
る実装密度を高めて、基板の小型化を図るべく有力な手
段である。セラミック回路基板において、多層化を実現
するための手段としては一般的には、三つの方法に大別
される。第一番目には、焼結されたセラミック基板の上
にスクリーン印刷技術を用い、導体ペーストと絶縁ペー
ストによって、それぞれ導体層と絶縁層を形成した後、
適当な温度領域で焼成し、これを繰9返すことによって
、多層化を図るいわゆる厚膜多層法といわれる方法であ
る。第二番目には、未焼結のセラミックシート(いわゆ
るグリーンシート)の上に上記と同様に、スクリーン印
刷技術を用い、導体ペーストと絶縁ペーストによって、
それぞれ導体層と絶縁層とを交互に形成してゆき、最後
にグリーンシー、トとスクリーン印刷技術で形成した導
体層と絶縁層とを一括的に焼結するいわゆる印刷多層法
といわれる方法である。そして、第三番目には第二番目
の方法である印刷多層法で用いたと同様のグリーンシー
トの上に、上記と同様にスクリーン印刷技術を用い導体
ペーストによって、導体層を形成したものを所定の層数
1重ね合わせ、加熱。
Conventional technology In recent years, efforts have been made to make electronic devices smaller and thinner.
+ + 1rII L Sansaku n) 4-,
-, +-al voice 4'ffk b'o Masu foot 9 So-called chip components have been developed and put into practical use. Also,
The circuit board on which these components are mounted is also required to be small and thin, and various means to achieve these requirements have been proposed and are being put into practical use. The miniaturization requirements imposed on circuit boards are mainly measures for increasing wiring density, one of which is fine line formation technology and the other is multilayer technology. In particular, the realization of multilayer technology is an effective means for increasing the number of components mounted per unit area of the board, so-called mounting density, and reducing the size of the board. In ceramic circuit boards, there are generally three methods for realizing multilayering. First, a conductive layer and an insulating layer are formed using a conductive paste and an insulating paste, respectively, on a sintered ceramic substrate using screen printing technology.
This is a method called the so-called thick film multilayer method, in which multilayering is achieved by firing at an appropriate temperature range and repeating this process nine times. Second, using the same screen printing technique as above, on an unsintered ceramic sheet (so-called green sheet), with conductive paste and insulating paste,
This is a method called the printed multilayer method, in which conductive layers and insulating layers are formed alternately, respectively, and finally the conductive layers and insulating layers formed using green sheet and screen printing techniques are sintered all at once. . In the third method, a conductor layer is formed using conductor paste using the same screen printing technique as above on the same green sheet as used in the second method, the printed multilayer method. Stack 1 layer and heat.

加圧処理によって積層化し、適当な温度領域で一括的に
焼結し、セラミック多層基板を得るグリーンシート多層
法といわれる方法である。
This method is called the green sheet multilayer method, in which the ceramic multilayer substrate is obtained by laminating the layers by pressure treatment and sintering them all at once in an appropriate temperature range.

以下、図面を参照しながら、上述した従来のセラミック
多層基板と、その製造方法の一例を印刷多層法を用いτ
説明する。第4図で示すように、1.2a、2bハムe
203.Sio29Mg01zrO2゜pbo  など
を取分とする絶縁層であり、3a、sb。
Hereinafter, with reference to the drawings, an example of the above-mentioned conventional ceramic multilayer substrate and its manufacturing method will be explained using the printed multilayer method.
explain. As shown in Figure 4, 1.2a, 2b Ham e
203. This is an insulating layer containing Sio29Mg01zrO2゜pbo, etc., and 3a and sb.

3c 、 3dはW、Mo、Ag−Pd 、Au、Cu
などの金属からなる導体層であるolはグリーンシート
であり、その上下面にスクリーン印刷技術を用い、上記
導体用金属粉末を有機溶剤や樹脂に分散混合して得られ
る導体ペーストによって、第1の導体i3mと、第2の
導体層3bとが形成される0その上に同様の形成手段を
用いて、第1の絶縁層21Lを形成し、さらにそれを繰
シ返すことによって、第3の導体層30.第4の導体層
3d、および第2の絶縁層2bを形成し、セラミック多
層基体8を得るものである。この多階セラミック基体8
ば、第5図および第6図で示すように、耐火物で構成さ
れるセッター1oや棚板11の上に載置され、850〜
16oO℃の範囲内における適当な温度条件、ならびに
酸化性、還元性、中性のいづれかの雰囲気条件のもとで
焼結され、セラミック多層基板9となるものである。(
例えば、「電子材料41982年11月号64〜69ペ
ージ)発明が解決しようとする問題点 以上のように形成されたセラミック多層基板にオイテハ
、それを構成すルAe203r ””2 + MgJZ
r02 、 PbOなどを成分とする無機絶縁層とW。
3c, 3d are W, Mo, Ag-Pd, Au, Cu
The conductor layer OL is a green sheet, and screen printing technology is used on the upper and lower surfaces of the conductor layer, and a conductor paste obtained by dispersing and mixing the above conductor metal powder in an organic solvent or resin is applied to the first The conductor i3m and the second conductor layer 3b are formed.The first insulating layer 21L is formed thereon using the same forming means, and by repeating this process, the third conductor layer 3b is formed. Layer 30. A fourth conductor layer 3d and a second insulating layer 2b are formed to obtain a ceramic multilayer substrate 8. This multi-level ceramic substrate 8
For example, as shown in FIGS. 5 and 6, it is placed on a setter 1o or shelf board 11 made of refractory material,
The ceramic multilayer substrate 9 is obtained by sintering under appropriate temperature conditions within the range of 160° C. and oxidizing, reducing, or neutral atmospheric conditions. (
For example, "Electronic Materials 4, November 1982 issue, pp. 64-69) Problems to be Solved by the Invention When a ceramic multilayer substrate formed as described above is used, Ae203r""2 + MgJZ that constitutes the ceramic multilayer substrate is used.
r02, an inorganic insulating layer containing PbO, etc., and W.

Mo 、 Ag −Pd 、ムu 、 Cu、などを主
成分とする金属導体層とは本質的に熱膨張係数が違うこ
とから焼結過程で生ずる前記無機絶縁層と金属導体層と
の収縮差、膨張差に起因するセラミック多層基板の反シ
の発生を免れることが不可能である。これらの反りは、
上記セラミック多層基板上での以降のたとえば、抵抗層
やガラス保護層などの印刷形成時や基板搬送時に大きな
影響を及ぼし、歩留シや品質の低下を招く、大きな要因
となるものである。一般的には反りの発生した上記のよ
うなセラミック多層基板は、その上に適当な重量を有す
る耐火物を積載し、再度焼成時の温度近傍で熱処理をし
て、反りを矯正し、基板の平坦化全図−)℃いるのが実
状である。
The shrinkage difference between the inorganic insulating layer and the metal conductor layer that occurs during the sintering process because the coefficient of thermal expansion is essentially different from that of the metal conductor layer whose main component is Mo, Ag-Pd, Mu, Cu, etc. It is impossible to avoid the occurrence of warping of the ceramic multilayer substrate due to the difference in expansion. These warps are
This has a great influence on the subsequent printing of resistive layers, glass protective layers, etc. on the ceramic multilayer substrate, and on the transportation of the substrate, and is a major factor leading to a decrease in yield and quality. Generally, when a ceramic multilayer board like the one described above is warped, a refractory with an appropriate weight is placed on top of it, and then heat treated again at a temperature near the firing temperature to correct the warp and make the board. The actual situation is that the entire flattening figure is -)°C.

これらの方法は、一旦硬質化したセラミック基板上に重
量耐火物を載せて、強制的に反υを矯正することから、
導体層と絶縁層との間で剥離やクラックが発生したり、
はなはだし甥に至つCは。
These methods involve placing heavy refractories on a ceramic substrate that has been hardened and forcibly correcting the υ.
Peeling or cracking may occur between the conductive layer and the insulating layer, or
The C that leads to Barefoot Nephew.

セラミック基板の割れを生ずるなどの欠点を有している
ものである。また、反り修正の工程が存在することは、
必然的に工程増加を招くこととなりコスト面でも、生産
性の面でも、問題点を有しているものである。
This method has drawbacks such as cracking of the ceramic substrate. In addition, the existence of a warp correction process means that
This inevitably leads to an increase in the number of steps, which poses problems in terms of both cost and productivity.

本発明は、上記問題点を改善するために、為ちれたもの
であり、反シ修正工程を無<L”Cも、実用的に許容で
きる程度にまで、反り量を軽減したセラミック多層基板
の製造方法を提供するものである0 問題点を解決するための手段 上記問題点を解決するために、本発明のセラミック多層
基板は、焼結する際に、前記未焼結のセラばツク多層基
体の厚みより小δく焼結した後のセラミック多層基板の
厚みより大きな範囲の空隙部位に上記未焼結のセラミッ
ク多層基体を収納載置して焼結することを特徴とし、そ
の結果、反りの微少なセラミック多層基板を得んとする
ものである。
The present invention has been devised in order to improve the above-mentioned problems, and provides a ceramic multilayer substrate in which the amount of warpage is reduced to a practically acceptable level without the need for a warp correction process. Means for Solving the Problems In order to solve the above problems, the ceramic multilayer substrate of the present invention has a method of manufacturing the unsintered ceramic multilayer substrate during sintering. It is characterized in that the unsintered ceramic multilayer substrate is housed and placed in a void area in a range larger than the thickness of the ceramic multilayer substrate after sintering to a smaller δ than the thickness of the substrate and sintered, and as a result, warpage is prevented. The purpose of this study is to obtain a ceramic multilayer substrate with a small size.

作用 本発明は、セラミック多層基体を上記の配置構成に従っ
て焼結することによシ、それを形成する無機絶縁1と金
属導体層が焼結の際に受ける温度条件や雰囲気条件が均
一安定化されることによって、双方の収縮差や、膨張差
が緩和され、その結果極めて反りの微少なセラミック多
層基板が得られるものである。
Effect of the present invention By sintering the ceramic multilayer substrate according to the above arrangement, the temperature and atmospheric conditions that the inorganic insulation 1 and metal conductor layer that form it are subjected to during sintering are stabilized uniformly. By doing so, the difference in contraction and expansion between the two is alleviated, and as a result, a ceramic multilayer substrate with extremely small warpage can be obtained.

実施例 以下、本発明の一実施例におけるセラミック多層基板の
製造方法について、図面を参照しながら説明する。第1
図は、本発明の実施例における七クイック多層基板の製
造方法を示すものである。
EXAMPLE Hereinafter, a method for manufacturing a ceramic multilayer substrate according to an example of the present invention will be described with reference to the drawings. 1st
The figure shows a method for manufacturing a seven-quick multilayer board according to an embodiment of the present invention.

第1図において、8は従来の技術の中で説明したように
、スクリーン印刷技術を用い、セラミックグリーンシー
トの上に印刷多層法もしくはセラミック多層法で形成さ
れたセラミック多層基体であり、たとえば、92〜96
チのアルミナを含有する無機絶縁層とWを主成分とする
金属導体層とからなる。これら、セラミック多層基体8
を予め棚板11の上に載せられたセッター10の上に載
置する。しかる後に、上記セラばツク多層基板8の厚み
より小さく、それを焼結した後のセラミック多層基板の
厚みより大きな範囲の空隙部位を確保できるような脚付
セッター11を、セッター10上の積載位置二P1〜P
4  に載置する。
In FIG. 1, 8 is a ceramic multilayer substrate formed by a printed multilayer method or a ceramic multilayer method on a ceramic green sheet using screen printing technology, as explained in the conventional technique. ~96
It consists of an inorganic insulating layer containing alumina and a metal conductor layer containing W as a main component. These ceramic multilayer substrates 8
is placed on the setter 10 that has been placed on the shelf board 11 in advance. After that, a setter 11 with legs that can secure a gap area smaller than the thickness of the ceramic multilayer substrate 8 and larger than the thickness of the ceramic multilayer substrate after sintering is moved to a loading position on the setter 10. 2P1~P
Place it on 4.

以上のように構成でれたセラばツク多層基板の製造方法
について、以下第2図および第3図を用いて、その動作
を説明する。第2図は1脚付セッターが載置された後の
棚組構造体の正面図を示すものであシ、第3図は、その
一部拡大図を示すものである。第2図および第3図に示
すように、棚板11の上にセッター10が載せられてお
シ、ざらに脚付セッター12の脚部12&により℃確保
された空隙部位13にセラミック多層基体8が収納載置
されている。
The operation of the method for manufacturing the ceramic multilayer board constructed as described above will be described below with reference to FIGS. 2 and 3. FIG. 2 shows a front view of the shelf assembly structure after the setter with one leg is placed thereon, and FIG. 3 shows a partially enlarged view thereof. As shown in FIGS. 2 and 3, the setter 10 is placed on the shelf board 11, and the ceramic multilayer base 8 is placed in the gap 13 secured by the legs 12 & of the setter 12 with legs. is placed in storage.

これら第2図および第3図に示す棚組構造体を1600
’Cの還元雰囲気中(水素と窒素の混合ガス中)で焼成
すると、セラミック多層基体8を形氏している。セラミ
ックグリーンシート1と無機絶縁層2&、2bと、金属
導体層3a、3b。
The shelf assembly structure shown in FIG. 2 and FIG.
When fired in a reducing atmosphere of C (in a mixed gas of hydrogen and nitrogen), the ceramic multilayer substrate 8 is formed. Ceramic green sheet 1, inorganic insulating layers 2&, 2b, and metal conductor layers 3a, 3b.

30.3dとは焼成過程で互いに膨張、収縮作用を繰シ
返しながら、最終的には焼結反応を完了しセラミック多
層基板9となる。この時′5セラミック多層基体8を収
納載置する空隙部位13の広狭の度合い(この場合は、
脚付セッターの脚部12の高さ)によって焼結後のセラ
ミック多層基板90反シ状態が大きく依存することが発
明者等の実験によって確認された。それを示したのが第
4図であり、この図から明らかなように、空隙部位寸法
二〇が未焼結基板の厚み:t2 より小さい領域すなわ
ち、G(t2 の範囲内で反りの軽減効果が著しいこと
がわかる。一方、空隙部位寸法:Gが焼結した後のセラ
ばツク多層基板の厚み:t1 未満の領域すなわち、G
 < tl  の範囲内では焼結完了時点までセラばツ
ク多層基板表面92Lとセッター裏面12bとが接触し
℃いるため、それによる焼結収縮時の滑り摩擦抵抗が増
大し、それに伴って収縮方位バランスが崩れ、その結果
、セラミック多層基板9の変形を発生せしめるものであ
る。
30.3d and 30.3d repeatedly expand and contract with each other during the firing process, and finally complete the sintering reaction to form the ceramic multilayer substrate 9. At this time, the degree of width of the cavity 13 in which the '5 ceramic multilayer substrate 8 is accommodated (in this case,
The inventors' experiments have confirmed that the state of the ceramic multilayer substrate 90 after sintering largely depends on the height of the legs 12 of the setter with legs. This is shown in Fig. 4, and as is clear from this figure, the warpage reduction effect is achieved in the region where the gap size 20 is smaller than the thickness of the unsintered substrate: t2, that is, within the range of G(t2). On the other hand, the area where the gap size: G is less than the thickness of the ceramic multilayer board after sintering: t1, that is, the area where G
In the range of < tl, the ceramic block multilayer substrate surface 92L and the setter back surface 12b are in contact with each other until the sintering is completed, so the sliding friction resistance during sintering shrinkage increases, and the shrinkage orientation balance accordingly. As a result, the ceramic multilayer substrate 9 is deformed.

この場合の基板反り世は、空隙部位寸法二Gが。In this case, the warpage of the substrate is as follows: the gap area size is 2G.

上記範囲内においてセラεツク多層基板長手方向で・ 
100μm以内であうた。この程度の反υ量であれば、
以降の印刷工程や搬送時においても何等実用上問題はな
く、十分許容できうる範囲である0 以上のように本実施例によれば、セラミック多層基板を
焼結する際に未焼結のセラミック多層基体の厚みより小
さく、焼結後のセラミック多層基板の厚みより大きな空
隙部位に、未焼結のセラミック多層基体を収納載置して
焼結することにより。
Within the above range, in the longitudinal direction of the multilayer board,
Warming occurred within 100 μm. With this amount of reaction υ,
There are no practical problems during the subsequent printing process or transportation, and the range is within an acceptable range.0 As described above, according to this example, when sintering a ceramic multilayer substrate, the unsintered ceramic multilayer By placing and sintering an unsintered ceramic multilayer substrate in a void region that is smaller than the thickness of the substrate and larger than the thickness of the ceramic multilayer substrate after sintering.

実用上問題のない程度にまで基板反り量:Bを軽減した
セラミック多層基板を提供することができるものである
。また、従来必須であった反り修正工程を削除できるこ
とから、工数低減が可能となり、生産性の向上に寄与で
きると共に、反り修正時に発生していた導体層の剥離や
クラック基板自体の割れなどの品質問題をも回避できる
ものである。
It is possible to provide a ceramic multilayer substrate in which the amount of substrate warpage (B) is reduced to an extent that causes no practical problems. In addition, since it is possible to eliminate the warp correction process that was previously required, it is possible to reduce the number of man-hours, contributing to improved productivity, and to prevent quality problems such as peeling of the conductor layer and cracks in the board itself that occur during warp correction. Problems can also be avoided.

発明の効果 以上のように本発明は、セラεツク多層基板を焼結する
際に、未焼結セラミック多層基体を収納載置する空隙部
位を適切に制御しτ、焼結することにより、反り量の微
少なセラミック多層基板を得ることができ、その結果、
価格が安価で、しかも高品質のセラミック多層基板が提
供できることとなり、工業上極めて有益な発明である。
Effects of the Invention As described above, the present invention prevents warping by properly controlling the void area in which the unsintered ceramic multilayer substrate is placed and sintering it when sintering the ceramic multilayer substrate. It is possible to obtain a small amount of ceramic multilayer substrate, and as a result,
It is possible to provide a ceramic multilayer substrate of low cost and high quality, which is an extremely useful invention industrially.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例におけるセラミック多層基板
の製造方法を示す斜視図、第2図は同製造方法を示す正
面図、第3図は同製造方法を示す要部拡大正面図、第4
図は同製造方法の効果を示す反り特性図、第5図にセラ
ミック多層基板の構造を示す要部断面斜視図、第6図は
従来のセラミック多層基板の製造方法を示す斜視図、第
7図は同製造方法を示す正面図である。 8・・・・・・セラミック多層基体、9・・・・・・セ
ラミック多層基板、10・・・・・・セッター、11・
・・・・・棚板。 12;・・・・・脚付セッター、122L・・・・・・
セッター脚部、13・・・・・・空隙部位、14・・・
・・・棚組構造体。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名8−
一でうSプフヤノF【1ト 1!&−脚部 f名L−ヒツター1Δ書p 第4図 空碌舒1支ζj升Q f−−デリーンシーに 2Q−−−71虻1ゑ4 21、−一子2  争 第  5  図                  
 3Q−−っト1噛Iロブ13b−−−r2  ” DC−−−4r3  =1 Jd−−→4’ 9−m−でうSブクク4基板
FIG. 1 is a perspective view showing a method for manufacturing a ceramic multilayer substrate according to an embodiment of the present invention, FIG. 2 is a front view showing the same manufacturing method, and FIG. 3 is an enlarged front view of main parts showing the same manufacturing method. 4
The figure is a warpage characteristic diagram showing the effect of the manufacturing method, Figure 5 is a cross-sectional perspective view of the main part showing the structure of the ceramic multilayer board, Figure 6 is a perspective view showing the conventional manufacturing method of the ceramic multilayer board, and Figure 7 is a front view showing the same manufacturing method. 8...Ceramic multilayer substrate, 9...Ceramic multilayer substrate, 10...Setter, 11...
·····Shelf board. 12;...Setter with legs, 122L...
Setter leg portion, 13...Gap portion, 14...
...shelf structure. Name of agent: Patent attorney Toshio Nakao and 1 other person8-
Ichideu S Pufuyano F [1 to 1! &-Legs f name L-Hitzter 1Δ book p Fig. 4 Empty power 1 branch ζj square Q f--Delinshi 2Q---71 虻1ゑ4 21, -Ichiko 2 Conflict No. 5
3Q--to 1 bite I lob 13b--r2 ” DC---4r3 = 1 Jd--→4' 9-m-de S book 4 board

Claims (1)

【特許請求の範囲】[Claims]  セラミックグリーンシート上に、金属導体層と無機絶
縁層を配設したセラミック多層基体を焼結する際に、上
記セラミック多層基体の厚みより小さく、それを焼結し
た後のセラミック多層基板の厚みより大きな範囲の空隙
部位に、上記セラミック多層基体を収納、載置して焼結
することを特徴とするセラミック多層基板の製造方法。
When sintering a ceramic multilayer substrate in which a metal conductor layer and an inorganic insulating layer are arranged on a ceramic green sheet, the thickness of the ceramic multilayer substrate is smaller than the thickness of the ceramic multilayer substrate and larger than the thickness of the ceramic multilayer substrate after sintering it. A method for manufacturing a ceramic multilayer substrate, comprising storing and placing the ceramic multilayer substrate in a gap region within the range, and sintering the ceramic multilayer substrate.
JP14559085A 1985-07-02 1985-07-02 Manufacture of ceramic multilayer substrate Pending JPS625851A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14559085A JPS625851A (en) 1985-07-02 1985-07-02 Manufacture of ceramic multilayer substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14559085A JPS625851A (en) 1985-07-02 1985-07-02 Manufacture of ceramic multilayer substrate

Publications (1)

Publication Number Publication Date
JPS625851A true JPS625851A (en) 1987-01-12

Family

ID=15388601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14559085A Pending JPS625851A (en) 1985-07-02 1985-07-02 Manufacture of ceramic multilayer substrate

Country Status (1)

Country Link
JP (1) JPS625851A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5178913A (en) * 1988-01-13 1993-01-12 Toyota Jidosha Kabushiki Kaisha Painting mask

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5178913A (en) * 1988-01-13 1993-01-12 Toyota Jidosha Kabushiki Kaisha Painting mask

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