JPS625648U - - Google Patents
Info
- Publication number
- JPS625648U JPS625648U JP9667185U JP9667185U JPS625648U JP S625648 U JPS625648 U JP S625648U JP 9667185 U JP9667185 U JP 9667185U JP 9667185 U JP9667185 U JP 9667185U JP S625648 U JPS625648 U JP S625648U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor integrated
- integrated circuit
- circuit board
- printed circuit
- heat dissipation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 230000017525 heat dissipation Effects 0.000 claims description 4
- 239000000919 ceramic Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第１図および第２図はこの考案の半導体集積回
路の実装構造の一実施例を示し、第１図は側面図
、第２図はプリント基板を取出して示す斜視図、
第３図および第４図は従来の実装構造を示し、第
３図は分解斜視図、第４図は側面図である。
１１……ＬＳＩ、１２……セラミツクス容器、
１３……蓋、１４……外部接続端子、１５……放
熱フイン、１６……プリント基板、１７……スル
ーホール、１８……放熱パツド、１９……スルー
ホール、２０，２１……半田。
1 and 2 show an embodiment of the mounting structure of the semiconductor integrated circuit of this invention, FIG. 1 is a side view, FIG. 2 is a perspective view showing the printed circuit board taken out,
3 and 4 show a conventional mounting structure, with FIG. 3 being an exploded perspective view and FIG. 4 being a side view. 11...LSI, 12...ceramics container,
13... Lid, 14... External connection terminal, 15... Heat dissipation fin, 16... Printed circuit board, 17... Through hole, 18... Heat dissipation pad, 19... Through hole, 20, 21... Solder.
Claims (1)
スルーホールを有し、かつ半導体集積回路の本体
に対応して放熱パツドを表面上に備えたプリント
基板と、 (b) このプリント基板の前記スルーホールに外
部接続端子が挿入されて半田付けされ、かつ本体
下面が前記プリント基板の前記放熱パツドに半田
付けされた半導体集積回路とを具備してなる半導
体集積回路の実装構造。[Scope of Claim for Utility Model Registration] (a) A printed circuit board having through holes corresponding to external connection terminals of a semiconductor integrated circuit and having a heat dissipation pad on its surface corresponding to the main body of the semiconductor integrated circuit; (b) a semiconductor integrated circuit comprising: a semiconductor integrated circuit having external connection terminals inserted and soldered into the through holes of the printed circuit board, and whose lower surface is soldered to the heat dissipation pads of the printed circuit board; implementation structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9667185U JPS625648U (en) | 1985-06-27 | 1985-06-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9667185U JPS625648U (en) | 1985-06-27 | 1985-06-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS625648U true JPS625648U (en) | 1987-01-14 |
Family
ID=30962661
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9667185U Pending JPS625648U (en) | 1985-06-27 | 1985-06-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS625648U (en) |
-
1985
- 1985-06-27 JP JP9667185U patent/JPS625648U/ja active Pending
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