JPS6247166A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6247166A
JPS6247166A JP18701385A JP18701385A JPS6247166A JP S6247166 A JPS6247166 A JP S6247166A JP 18701385 A JP18701385 A JP 18701385A JP 18701385 A JP18701385 A JP 18701385A JP S6247166 A JPS6247166 A JP S6247166A
Authority
JP
Japan
Prior art keywords
region
conductivity type
impurity region
film
window
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18701385A
Other languages
Japanese (ja)
Inventor
Noboru Yamamoto
昇 山本
Junichi Okano
岡野 順市
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP18701385A priority Critical patent/JPS6247166A/en
Publication of JPS6247166A publication Critical patent/JPS6247166A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enhance a yield and to reduce a leakage current by coating an insulating film on a semiconductor substrate, opening a window, deeply diffusing one conductivity type region, then expanding the area of the window, coating the entire surface with a reverse conductivity type diffusion source film, and heat treating it to form a region having a wide area and a shallow reflection conductivity type on one conductivity type region. CONSTITUTION:An insulating film 11 is coated on a semiconductor substrate 10, a window is opened, and an N<+> type region 12 is formed at a deep position by thermal diffusing or ion implanting. Then, the window of the opened film 11 is expanded with the mask, and the entire surface which includes the expanded hole 13 is coated with a reverse conductivity type diffusion source film 14. Thereafter, a P<+> type region 15 having a wider area than the region 12 is disposed on the region 12 by heat treating to form a semiconductor device such as a varicap diode. Thus, the manufacturing yield is improved, and a leakage current level is improved.

Description

【発明の詳細な説明】 本発明は、半導体装置の製造方法に関する。[Detailed description of the invention] The present invention relates to a method for manufacturing a semiconductor device.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来、所謂バリギャップダイオードからなる半導体装置
は次のようにして製造されてbる。
Conventionally, a semiconductor device comprising a so-called vari-gap diode has been manufactured as follows.

先ず、第4図に示す如く、半導体基板1の主面に熱酸化
法により厚さ約1μmの絶縁膜2を形成する。次いで、
絶R膜2に選択エツチングを施し、半導体基板Iの所定
領域を露出する開口部を形成する。次いで、この絶縁膜
2をマスクにして熱拡散法或はイオン注入法によシ半導
体基板1内に°所定導電型の高濃度不純物領域3を形成
する。次いで、選択エツチングによシ開ロ部を拡大した
後、高濃度不純物領域5及イ導体基板1の露出表面を覆
うようにして、高濃度不純物領域3と反対導電型の拡散
源膜4をCvD(Chamlcal Vapor De
position )法等によシ絶縁膜2上に形成する
。次いで、拡散源膜4に熱処理を施し、高濃度不純物領
域3よシ広く、かつ、浅い拡散深さの反対導電型の不純
物領域5の約60%を形成する。次いで、不純物領域5
に接続する電極を形成するためのコンタクトホール6を
拡散源膜4に開口して不純物領域5の主面を露出する。
First, as shown in FIG. 4, an insulating film 2 having a thickness of about 1 μm is formed on the main surface of a semiconductor substrate 1 by thermal oxidation. Then,
The insulator film 2 is selectively etched to form an opening exposing a predetermined region of the semiconductor substrate I. Next, using this insulating film 2 as a mask, a high concentration impurity region 3 of a predetermined conductivity type is formed in the semiconductor substrate 1 by thermal diffusion or ion implantation. Next, after enlarging the bottom part of the opening by selective etching, the diffusion source film 4 of the opposite conductivity type to the high concentration impurity region 3 is coated with CvD so as to cover the high concentration impurity region 5 and the exposed surface of the conductive substrate 1. (Chamlcal Vapor De
It is formed on the insulating film 2 by the position method or the like. Next, the diffusion source film 4 is subjected to heat treatment to form an impurity region 5 of the opposite conductivity type, which is wider than the high concentration impurity region 3 and has a shallow diffusion depth, and covers about 60% of the region. Next, impurity region 5
A contact hole 6 for forming an electrode connected to is opened in the diffusion source film 4 to expose the main surface of the impurity region 5.

然る後、コンタクトホール6を開口した状態で熱処理を
施し、所定の不純物領域5を形成する。次いで、コンタ
クトホール7を介して不純物領域5に接続する電極(図
示せず)を形成した後、半導体基板1の裏面側に裏面電
極7を形成して半導体装置を得る。
Thereafter, heat treatment is performed with the contact hole 6 open to form a predetermined impurity region 5. Next, after forming an electrode (not shown) connected to impurity region 5 through contact hole 7, back electrode 7 is formed on the back side of semiconductor substrate 1 to obtain a semiconductor device.

このよう彦半導体装置の製造方法では、不純物領域5を
形成する際に拡散源膜4にコンタクトホール6が開口さ
れているため、不純物領域5の表面濃度が低下し、リー
ク電流を増大する問題があった。更に、不純物領域5の
形成を一回の熱処理工程で完了しないため、歩留υを十
分に向上できない問題があった。
In this Hiko semiconductor device manufacturing method, since the contact hole 6 is opened in the diffusion source film 4 when forming the impurity region 5, there is a problem that the surface concentration of the impurity region 5 decreases and leakage current increases. there were. Furthermore, since the formation of the impurity region 5 is not completed in one heat treatment process, there is a problem that the yield υ cannot be sufficiently improved.

〔発明の目的〕[Purpose of the invention]

本発明は、歩留りの向上及びリーク電流レベルの改善を
図った半導体装置を容易に得ることができる半導体装置
の製造方法を提供することをその目的とするものである
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that can easily produce a semiconductor device with improved yield and leakage current level.

〔発明の概要〕[Summary of the invention]

本発明は、拡散源膜を残存させた状態で反対導電型の不
純物領域を完全に形成する工程を設けたことによシ、歩
留シの向上及びリーク電流レベルの改善を図った半導体
装置を容易にイ(Iることかできる半導体装置の製造方
法である。
The present invention provides a semiconductor device with improved yield and leakage current level by providing a step of completely forming an impurity region of the opposite conductivity type with the diffusion source film remaining. This is a method of manufacturing a semiconductor device that can be easily performed.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例について図面を参Ji@ I〜て
説明する。先ず、第1図に示す如く、半導体基板lOの
主面側に熱酸化法により厚さ約1/zmの絶縁膜IIを
形成する。次いで、選択エツチングによシ半導体基板1
0の所定領域を露出する開口部(図示せず)を絶縁MK
IIに形成する。
Embodiments of the present invention will be described below with reference to the drawings. First, as shown in FIG. 1, an insulating film II having a thickness of about 1/zm is formed on the main surface side of a semiconductor substrate IO by thermal oxidation. Next, the semiconductor substrate 1 is etched by selective etching.
An opening (not shown) that exposes a predetermined area of
Form II.

次いで、熱拡散法或はイオン注入法により絶縁膜1ノを
マスクにして半導体基板10内に所定の拡散深さで高濃
度不純物領域12を形成する。
Next, a high concentration impurity region 12 is formed at a predetermined diffusion depth in the semiconductor substrate 10 using the insulating film 1 as a mask by thermal diffusion or ion implantation.

次いで、選択エツチングによ)開口部を拡大する。次に
、拡大された開口部13によシ露出された領域を塞ぐよ
うにして高濃度不純物領域12と反対導電型の拡散源膜
14を絶縁膜11上に形成する。然る後、拡散源膜14
に熱処理を施し、高濃度不純物領域12よりも広く、か
つ、浅い反対導電型の不純物領域15を完全に形成する
。次に、拡散源Mz4に不純物領域15の所定領域に通
じるコンタクトホールを開口し、このコンタクトホール
を介して不純物領域15に接続する電極(図示せず)を
形成する。
The opening is then enlarged (by selective etching). Next, a diffusion source film 14 having a conductivity type opposite to that of the high concentration impurity region 12 is formed on the insulating film 11 so as to close the region exposed through the enlarged opening 13 . After that, the diffusion source membrane 14
A heat treatment is performed to completely form an impurity region 15 of the opposite conductivity type, which is wider and shallower than the high concentration impurity region 12. Next, a contact hole communicating with a predetermined region of impurity region 15 is opened in diffusion source Mz4, and an electrode (not shown) connected to impurity region 15 through this contact hole is formed.

次いで、半導体基板lOの裏面側に所定の裏面電極16
を形成して半導体装置を得る。
Next, a predetermined back electrode 16 is formed on the back side of the semiconductor substrate lO.
A semiconductor device is obtained by forming.

このようにこの半導体装置の創造方法では、コンタクト
ホールな開口する前に表面が拡散源膜14で覆われた状
態で完全に不純物領域15を形成するので、不純物領域
150表面濃度が低下するのを防止して、リーク電流の
増大を抑制することができる。因み忙、実施例によシ得
られた半導体装置ではリーク電流レベルエ、は、第2図
に示す如く、0.1〜1 nAの範囲にあることが実験
的に確認された。これに対して、従来の方法によシ得ら
れた半導体装置では、リーク電流レベルIRは、第3図
に示す如く1〜10nAの範囲にあることが実験的に確
認された。
In this way, in this method of creating a semiconductor device, the impurity region 15 is completely formed with the surface covered with the diffusion source film 14 before the contact hole is opened, so that the surface concentration of the impurity region 150 is prevented from decreasing. It is possible to prevent this and suppress an increase in leakage current. Incidentally, it was experimentally confirmed that the leakage current level of the semiconductor device obtained in the example was in the range of 0.1 to 1 nA, as shown in FIG. On the other hand, it has been experimentally confirmed that in semiconductor devices obtained by conventional methods, the leakage current level IR is in the range of 1 to 10 nA as shown in FIG.

また、実施例の半導体装置の製造方法では、一回の熱処
理によって不純物領域15を完全に形成するので歩留り
を著しく向上させることができる。因みに、従来の方法
に比べて歩留シを20〜30%向上できることが実験的
に確認されている。
Furthermore, in the semiconductor device manufacturing method of the embodiment, since impurity region 15 is completely formed by one heat treatment, the yield can be significantly improved. Incidentally, it has been experimentally confirmed that the yield can be improved by 20 to 30% compared to conventional methods.

〔発明の効果〕〔Effect of the invention〕

以上説明した如く、本発明に係る半導体装置の創造方法
によれば、歩留りの向上及びリーク電流レベルの改善を
図った半導体装置を容易に得ることができるものである
As described above, according to the method for creating a semiconductor device according to the present invention, a semiconductor device with improved yield and leakage current level can be easily obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の実施例を示す説明図、第2図及び第
3図は、リーク電流レベルと個数との関係を示す特性図
、第4図は、従来の方法を示す説明図である。 10・・・半導体基板、11・・・絶縁膜、12・・・
高濃度不純物領域、13・・・開口部、14・・・拡散
源膜、15・・・不純物領域、16・・・裏面電極。 出願人代理人 弁理土鈴性 武 彦 6一 第1図 第4図 (nA)             (nA)第3図 
  第2図
Fig. 1 is an explanatory diagram showing an embodiment of the present invention, Figs. 2 and 3 are characteristic diagrams showing the relationship between leakage current level and number of pieces, and Fig. 4 is an explanatory diagram showing a conventional method. be. 10... Semiconductor substrate, 11... Insulating film, 12...
High concentration impurity region, 13... Opening, 14... Diffusion source film, 15... Impurity region, 16... Back electrode. Applicant's attorney Takehiko Takehiko 61 Figure 1 Figure 4 (nA) (nA) Figure 3
Figure 2

Claims (1)

【特許請求の範囲】[Claims] 一導電型の半導体基板の主面に絶縁膜を形成する工程と
、該絶縁膜に前記主面の所定領域を露出する開口部を形
成する工程と、前記絶縁膜をマスクにして前記半導体基
板内に高濃度不純物領域を形成する工程と、前記開口部
を拡大する工程と、拡大された開口部を塞ぐように前記
高濃度不純物領域と反対導電型の拡散源膜を前記絶縁膜
上に形成する工程と、該拡散源膜に熱処理を施して前記
高濃度不純物領域の表面領域にこれより広く、かつ、浅
い反対導電型の不純物領域を形成する工程とを具備する
ことを特徴とする半導体装置の製造方法。
forming an insulating film on the main surface of a semiconductor substrate of one conductivity type; forming an opening in the insulating film to expose a predetermined region of the main surface; forming a high concentration impurity region, enlarging the opening, and forming a diffusion source film of a conductivity type opposite to that of the high concentration impurity region on the insulating film so as to close the enlarged opening. and a step of performing heat treatment on the diffusion source film to form an impurity region of the opposite conductivity type that is wider and shallower in the surface region of the high concentration impurity region. Production method.
JP18701385A 1985-08-26 1985-08-26 Manufacture of semiconductor device Pending JPS6247166A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18701385A JPS6247166A (en) 1985-08-26 1985-08-26 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18701385A JPS6247166A (en) 1985-08-26 1985-08-26 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6247166A true JPS6247166A (en) 1987-02-28

Family

ID=16198674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18701385A Pending JPS6247166A (en) 1985-08-26 1985-08-26 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6247166A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07187877A (en) * 1993-12-24 1995-07-25 Nec Corp Image furnace
US5854117A (en) * 1995-09-18 1998-12-29 U.S. Philips Corporation Method of manufacturing a varicap diode, a varicap diode, a receiver device, and a TV receiver set

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07187877A (en) * 1993-12-24 1995-07-25 Nec Corp Image furnace
US5854117A (en) * 1995-09-18 1998-12-29 U.S. Philips Corporation Method of manufacturing a varicap diode, a varicap diode, a receiver device, and a TV receiver set

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