JPS6244564U - - Google Patents

Info

Publication number
JPS6244564U
JPS6244564U JP13711485U JP13711485U JPS6244564U JP S6244564 U JPS6244564 U JP S6244564U JP 13711485 U JP13711485 U JP 13711485U JP 13711485 U JP13711485 U JP 13711485U JP S6244564 U JPS6244564 U JP S6244564U
Authority
JP
Japan
Prior art keywords
control device
low frequency
central control
trigger pulse
frequency trigger
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13711485U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13711485U priority Critical patent/JPS6244564U/ja
Publication of JPS6244564U publication Critical patent/JPS6244564U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の外部同期システムを用いた監
視用CCTVシステムの一例を示す概略ブロツク
図、第2図a〜dは各部の信号波形を示す波形図
、第3図aは第2図aにおけるA部拡大図、第3
図bは第2図dにおけるB部拡大図、第4図は従
来の外部同期システムの一例を示す概略ブロツク
図である。 1……CCDカメラ、2……マスターコントロ
ーラ、3……同軸ケーブル、11……インピーダ
ンス変換回路、12……トリガパルス分離回路、
14……タイミングパルス発生回路、21……フ
イールドスキツプパルス発生回路、22……カメ
ラ駆動用DC電源、23……インピーダンス変換
回路、26……アナログスイツチ、27……フイ
ールドスキツプパルスキヤンセル回路。
Fig. 1 is a schematic block diagram showing an example of a monitoring CCTV system using the external synchronization system of the present invention, Fig. 2 a to d are waveform diagrams showing signal waveforms of each part, and Fig. 3 a is a Enlarged view of part A, 3rd
FIG. b is an enlarged view of part B in FIG. 2d, and FIG. 4 is a schematic block diagram showing an example of a conventional external synchronization system. 1... CCD camera, 2... Master controller, 3... Coaxial cable, 11... Impedance conversion circuit, 12... Trigger pulse separation circuit,
14... Timing pulse generation circuit, 21... Field skip pulse generation circuit, 22... DC power supply for camera drive, 23... Impedance conversion circuit, 26... Analog switch, 27... Field skip pulse cancellation circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 外部に設けられた中央制御装置からビデオカメ
ラに内蔵されたタイミングパルス発生回路に低周
波トリガパルスが供給され、この低周波トリガパ
ルスに同期した映像信号が前記中央制御装置側へ
送出されることを特徴とする外部同期システム。
A low frequency trigger pulse is supplied from an external central control device to a timing pulse generation circuit built into the video camera, and a video signal synchronized with this low frequency trigger pulse is sent to the central control device. Features an external synchronization system.
JP13711485U 1985-09-06 1985-09-06 Pending JPS6244564U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13711485U JPS6244564U (en) 1985-09-06 1985-09-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13711485U JPS6244564U (en) 1985-09-06 1985-09-06

Publications (1)

Publication Number Publication Date
JPS6244564U true JPS6244564U (en) 1987-03-18

Family

ID=31040861

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13711485U Pending JPS6244564U (en) 1985-09-06 1985-09-06

Country Status (1)

Country Link
JP (1) JPS6244564U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6038980A (en) * 1983-08-12 1985-02-28 Erubetsukusu Japan Kk Method and apparatus for external synchronization of information transmission system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6038980A (en) * 1983-08-12 1985-02-28 Erubetsukusu Japan Kk Method and apparatus for external synchronization of information transmission system

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