JPS6241426B2 - - Google Patents

Info

Publication number
JPS6241426B2
JPS6241426B2 JP54152842A JP15284279A JPS6241426B2 JP S6241426 B2 JPS6241426 B2 JP S6241426B2 JP 54152842 A JP54152842 A JP 54152842A JP 15284279 A JP15284279 A JP 15284279A JP S6241426 B2 JPS6241426 B2 JP S6241426B2
Authority
JP
Japan
Prior art keywords
layer
collector
base layer
type
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54152842A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5674958A (en
Inventor
Satoshi Shinozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Original Assignee
CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHO ERU ESU AI GIJUTSU KENKYU KUMIAI filed Critical CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Priority to JP15284279A priority Critical patent/JPS5674958A/ja
Publication of JPS5674958A publication Critical patent/JPS5674958A/ja
Publication of JPS6241426B2 publication Critical patent/JPS6241426B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors

Landscapes

  • Bipolar Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
JP15284279A 1979-11-26 1979-11-26 Manufacture of semiconductor device Granted JPS5674958A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15284279A JPS5674958A (en) 1979-11-26 1979-11-26 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15284279A JPS5674958A (en) 1979-11-26 1979-11-26 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5674958A JPS5674958A (en) 1981-06-20
JPS6241426B2 true JPS6241426B2 (en:Method) 1987-09-02

Family

ID=15549316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15284279A Granted JPS5674958A (en) 1979-11-26 1979-11-26 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5674958A (en:Method)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4463369A (en) * 1981-06-15 1984-07-31 Rca Integrated circuit overload protection device
JP2605753B2 (ja) * 1987-11-05 1997-04-30 富士電機株式会社 縦形バイポーラトランジスタ
JPH10116917A (ja) * 1996-10-14 1998-05-06 Sharp Corp パワートランジスタ

Also Published As

Publication number Publication date
JPS5674958A (en) 1981-06-20

Similar Documents

Publication Publication Date Title
JPS62588B2 (en:Method)
JPH04266047A (ja) 埋め込み層形成に相当するｓｏｉ型半導体装置の製造方法及び半導体装置
JPS6392058A (ja) モノリシック高電圧半導体デバイスの製造方法
JPH0147014B2 (en:Method)
US4797372A (en) Method of making a merge bipolar and complementary metal oxide semiconductor transistor device
JPS6241425B2 (en:Method)
JPS6361777B2 (en:Method)
JPS6322070B2 (en:Method)
US3730786A (en) Performance matched complementary pair transistors
JP2672199B2 (ja) 半導体装置の製造方法
US5719432A (en) Semiconductor device including bipolar transistor with improved current concentration characteristics
US4224088A (en) Method for manufacturing a semiconductor device
JPS6241426B2 (en:Method)
JPS6095969A (ja) 半導体集積回路の製造方法
US5198374A (en) Method of making biCMOS integrated circuit with shallow N-wells
EP0057549A2 (en) Semiconductor device
US5099303A (en) BiCMOS integrated circuit with shallow n-wells
JP2822500B2 (ja) 半導体集積回路の製造方法
JPH0239091B2 (en:Method)
JP2708764B2 (ja) 半導体集積回路およびその製造方法
JPS5854502B2 (ja) 半導体装置の製造方法
JPH04152531A (ja) 半導体装置の製造方法
KR950012742B1 (ko) 2극성 및 상보 전계효과 트랜지스터들(BiCMOS)을 동시에 제조하는 방법
JP2656125B2 (ja) 半導体集積回路の製造方法
JPS61139057A (ja) 半導体集積回路装置の製造方法