JPS6240818A - Switching circuit - Google Patents

Abstract

PURPOSE:To obtain output more than the number of positions of a switch by providing an FF, two time constant circuits, and a logical circuit on an output side of the switch. CONSTITUTION:When a switch 1 is switched to the upper contact from the lower contact, three outputs of '1', '1' and '0' are obtained from a logical circuit 30 by an operation of an FF 2 and time constant circuits 3, 4. Subsequently, when the switch is switched to the lower contact from the upper contact, three outputs of '1', '0' and '1' are obtained from the logical circuit 50 in the same way. Also, when the switch is switched to the upper contact and also switched quickly to the lower contact, outputs of the time constant circuits 3, 4 are not varied, therefore, three outputs of '0', '1' and '1' are obtained from the logical circuit 50. In this way, output more than two positions of the switch 1 can be obtained.

Description

[Detailed Description of the Invention] [Summary] This is a switch circuit, and when changing its output to a TTL output, more output than the position can be obtained.

[Industrial application field]

The present invention relates to a switch circuit.

In digital circuits, it is necessary to perform mode switching and loopback operations.

In this case, it is necessary to realize a switch circuit that can obtain a plurality of outputs using one switch.

The present invention relates to a switch circuit for converting such a switch output into a TTI output.

[Prior art and problems to be solved by the invention] There are two representative examples of conventional switch circuits, as shown in FIGS. 4 and 5.

4 shows a switch circuit having an on-off type switch 1o, and FIG. 5 shows a switch circuit having an on-off 7-on type switch 20. In Figures 4 and 5, E5
(v) is the power supply voltage, 13 and 14゜23 and 24 are the resistances, 1
1 and 12. 21 and 22 are inverters.

In the switch circuit of FIG. 4, the middle point I is the upper contact point 10
Table 1 shows the truth table for the case (t, J) connected to 2 (t, J) and the case (D) connected to the lower contact +03. In the switch circuit of Fig. 5, the middle point 201 is connected to the upper contact 202. when it is in the neutral position (U), and when it is in the neutral position (
Table 2 lists the truth tables for the case (I) when connecting to the lower contact point 203 and the lower contact point 203, respectively.

Table 2 As is clear from Tables 1 and 2 above, an on-off type switch has two outputs (Figure 3), and an on-off-on type switch has three outputs (Figure 4). Second, the number of outputs is limited to less than the number of switch positions.

That is, in the conventional switch circuit, when converting a switch output into a TTL output, there was a problem in that it was not possible to obtain more outputs than the number of switch positions.

[Means and operations for solving the problems] An object of the present invention is to solve the above problems and obtain more output than the number of switch positions.

As shown in FIG. 1, this means includes a flip-flop 2 and time constant circuits 3 and 4 installed on the output side of the switch I, and a logic circuit 50 that performs a logical operation on the outputs of these circuits. If you switch to , the output of each time constant circuit will not change, so you can obtain more output than the number of switch positions.

〔Example〕

Hereinafter, the present invention will be explained by way of examples with reference to the accompanying drawings.

FIG. 2 is a configuration diagram showing an embodiment of the present invention.

In FIG. 2, 1 is an on-off type switch, 2 is a D-type frisopfron, 3 and 4 are first and second time constant circuits, respectively, 50 is a three-power NAND gate 5, an inverter 6.
A logic circuit consisting of two NAND gates 7, 8 and 9 are both resistors.

The on-off switch 1 consists of a middle point I', an upper contact 12, and a lower contact 13. It is connected.

A D-type flip-flop 2 and a second time constant circuit 4 are connected to the upper contact 12 .

The D-type flip-flop 2 has the function of changing its output state in response to the D input when the C9 power is turned on, and the second time constant circuit 4 has the function of delaying the input and outputting it. .

Further, a first time constant circuit 3 is connected to the lower contact point 13 of the switch 1 to delay input and output.

The inputs of the three-man NAND gate 5 are the Q output of the D-type flip-flop 2, the output of the inverter 6, and the output of the second time constant circuit 4, and the inputs of the two-man NAND gate 7 are the Q output of the D-type flip-flop 2, the output of the inverter 6, and the output of the second time constant circuit 4, respectively. This is the output.

The operation of the switch circuit having the above configuration will be explained based on FIG. 3.

First, the middle point 1 of the switch 1 is set to 1=18, and the lower contact 13 is switched to the -L contact 1z.

Due to the voltage drop caused by the resistor 9, the inputs of the flip-flop 2 and the terminals a and C of the second time constant circuit 4 become "Oo" (
Figure 3 (^)). On the other hand, the input to the terminal of the first time constant circuit 3 becomes "1" (FIG. 3(B)).

Therefore, the output of the first time constant circuit 3 becomes "L" with a delay of the time constant, and the output of the second time constant circuit 4 similarly becomes "0".

Furthermore, since the Q output of the D-type flip-flop 2 falls at the Cp large input, it maintains the previous rising output of "1".

Therefore, since the input of the three-man powered NAND gate 5 from the second time constant circuit 4 is "0", its output is "1".
(Fig. 3(E)).

Among the inputs of the two-man powered NAND gate 7, the input from the first time constant circuit 3 is inverted by the inverter 6, so
The output becomes "1" (FIG. 3(F)).

Further, the output of the second time constant circuit 4 is output as is ((ε) in FIG. 2).

Therefore 1=10 and 1=1. between 'l''.

Three outputs, "1" and "0", are obtained.

Next, 1=1. When the middle point II is switched from the upper contact point 1z to the lower contact point 13, the same operation causes o'',''
The three outputs of "o" and "l" are further 1=12 and the midpoint is 11.
When switching to the upper contact 12 and the lower contact at 1=1°, (Ls' tz ) changes to the first and second time constant circuits 3 and 4.
If it is sufficiently shorter than the time constant of 1. Second time constant circuit 3
, 4 do not change, “0”, “l”,
Three outputs of “1” are obtained (Fig. 3 fol, (
El, (Fl).

The above operations can be expressed in a truth table as shown in Table 3.

Table 3 Therefore, three more outputs than the two positions of switch 1 can be obtained.

〔Effect of the invention〕

As described above, according to the present invention, since a flip-flop and a time constant circuit are provided on the output side of the switch, more outputs than the number of switch positions can be obtained by instantaneously switching the switch.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a configuration diagram of an embodiment of the present invention, FIG. 3 is an explanatory diagram of the operation of the embodiment of the present invention, FIG. 4 is an explanatory diagram of the first prior art, and FIG. FIG. 5 is an explanatory diagram of the second prior art. DESCRIPTION OF SYMBOLS 1... Switch, 2... D-type flip-flop, 3... First time constant circuit, 4... Second time constant circuit, 5... 3-manual NAND gate, 6... Inverter, 7 ...Two-man NAND gate, 8.9...Resistor, 50...Logic circuit. Principle block diagram of the present invention Figure 1 Configuration diagram of an embodiment of the present invention Operation explanatory diagram of an embodiment of the present invention

Claims (1)

[Claims] A flip-flop (2), a first time constant circuit (3), and a second
A time constant circuit (4) is provided, one of the contacts of the switch (1) connects to the first time constant circuit (3), and the other contact connects to the flip-flop and the second time constant circuit (4). ), the outputs of the switch (1), the first time constant circuit (3), and the second time constant circuit (4) are connected to a logic circuit (50) that performs a predetermined logical operation, and the switch A switch circuit characterized in that more outputs than the number of positions of the switch can be obtained from the output side of the logic circuit by turning on and off the switch.