JPS623498A - Semiconductor memory device with on-chip ecc circuit - Google Patents

Semiconductor memory device with on-chip ecc circuit

Info

Publication number
JPS623498A
JPS623498A JP60143196A JP14319685A JPS623498A JP S623498 A JPS623498 A JP S623498A JP 60143196 A JP60143196 A JP 60143196A JP 14319685 A JP14319685 A JP 14319685A JP S623498 A JPS623498 A JP S623498A
Authority
JP
Japan
Prior art keywords
bit
decoder
data
reading
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60143196A
Other languages
Japanese (ja)
Inventor
Kazuyasu Fujishima
Masaki Kumanotani
Hideji Miyatake
Hideto Hidaka
Katsumi Dosaka
Tsutomu Yoshihara
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP60143196A priority Critical patent/JPS623498A/en
Publication of JPS623498A publication Critical patent/JPS623498A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To separate the writing and reading of data and to prevent the delay of a reading speed by executing error detection and correction by removing a determined sense amplifier output without passing a usual Y decoder.
CONSTITUTION: A switch S3 is set to a reading side R, in the same way as writing, one word line is selected by an X decoder 12, and the data are detected and amplified by sense amplifiers 11a and 11b. Next, independently from an ECC system, an (n) number of decoders in a Y decoder 10 are selected and (n) bit information is outputted from a terminal 9. At such a time, the output of the amplifier 11a of an determined N bit is inputted to a generating circuit 5 at an ECC circuit, the generated read checking bit and the read M bit checking bit are inputted to a generating circuit 6 and the syndrome is obtained. When the error is at the data, a decoder 7 and a correcting circuit 8 rewrite the data bit and the checking bit in memory cell arrays 3 and 4 through amplifiers 11a and 11b.
COPYRIGHT: (C)1987,JPO&Japio
JP60143196A 1985-06-28 1985-06-28 Semiconductor memory device with on-chip ecc circuit Pending JPS623498A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60143196A JPS623498A (en) 1985-06-28 1985-06-28 Semiconductor memory device with on-chip ecc circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60143196A JPS623498A (en) 1985-06-28 1985-06-28 Semiconductor memory device with on-chip ecc circuit

Publications (1)

Publication Number Publication Date
JPS623498A true JPS623498A (en) 1987-01-09

Family

ID=15333103

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60143196A Pending JPS623498A (en) 1985-06-28 1985-06-28 Semiconductor memory device with on-chip ecc circuit

Country Status (1)

Country Link
JP (1) JPS623498A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100455792B1 (en) * 2000-07-27 2004-11-15 엔이씨 일렉트로닉스 가부시키가이샤 Semiconductor memory device having ecc type error recovery circuit

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5220730A (en) * 1975-08-09 1977-02-16 Fujitsu Ltd Memory unit
JPS53143134A (en) * 1977-05-20 1978-12-13 Hitachi Ltd Semiconductor memory element
JPS55153196A (en) * 1979-05-14 1980-11-28 Nec Corp Semiconductor memory
JPS5683896A (en) * 1979-12-11 1981-07-08 Nec Corp Memory circuit
JPS5771596A (en) * 1980-10-20 1982-05-04 Fujitsu Ltd Nonolithic memory chip provided with correcting function
JPS61214298A (en) * 1985-03-20 1986-09-24 Toshiba Corp Semiconductor memory with error correcting function

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5220730A (en) * 1975-08-09 1977-02-16 Fujitsu Ltd Memory unit
JPS53143134A (en) * 1977-05-20 1978-12-13 Hitachi Ltd Semiconductor memory element
JPS55153196A (en) * 1979-05-14 1980-11-28 Nec Corp Semiconductor memory
JPS5683896A (en) * 1979-12-11 1981-07-08 Nec Corp Memory circuit
JPS5771596A (en) * 1980-10-20 1982-05-04 Fujitsu Ltd Nonolithic memory chip provided with correcting function
JPS61214298A (en) * 1985-03-20 1986-09-24 Toshiba Corp Semiconductor memory with error correcting function

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100455792B1 (en) * 2000-07-27 2004-11-15 엔이씨 일렉트로닉스 가부시키가이샤 Semiconductor memory device having ecc type error recovery circuit
US6851081B2 (en) 2000-07-27 2005-02-01 Nec Electronics Corporation Semiconductor memory device having ECC type error recovery circuit

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