JPS6232879B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a magnetic reproduction device for color video signals between different television standard systems, and more particularly, to a magnetic reproduction device for reproducing color video signals between different television standard systems, and in particular, when the number of horizontal scanning lines differs from each other and color video signals in a predetermined horizontal period are missing or overlapped. The present invention relates to a magnetic reproduction device for color video signals capable of compensating for phase shifts of carrier color signals due to various factors.

Typical television standard systems include:
There are NTSC, PAL, and SECAM formats. The NTSC system has a field frequency of 60Hz and the number of scanning lines per frame is 525 (hereinafter abbreviated as 525/60), whereas the PAL system and SECAM
The method (these are also called CCIR methods) has a field frequency of 50Hz and a number of scanning lines per frame.
625 pieces (hereinafter abbreviated as 625/50). Furthermore, the color signal transmission method is different; in the PAL method, the polarity of the I signal is inverted for each scanning line.
In the SECAM system, I and Q signals are FM-modulated and sent alternately (line sequentially) for each scanning line.

Therefore, due to differences in scanning methods, color signal transmission methods, etc., method conversion is required when exchanging information between these signals. Conversion methods include re-imaging method, delay line switching method, digital conversion method, etc.
Because the structure is large, complicated, and expensive, it is generally difficult to use it for anything other than broadcasting stations.

By the way, when using only a television receiver in a general home or for business purposes other than broadcasting stations, it is necessary to
NTSC format), the inconvenience caused by the differences in the television standard formats mentioned above did not pose much of a problem.

However, in recent years, with the spread of video tape recorders (hereinafter referred to as VTRs) for general home use or commercial use other than broadcasting stations, video software such as pre-recorded video tapes has become widely distributed. Nowadays, there are many cases where people want to play video software of other formats directly imported from regions using other television standard formats. In this case, it would be sufficient to have all VTRs and television receivers (or monitor receivers) for each television standard system, but for example,
In areas where NTSC broadcasting is available, PAL
It is very uneconomical to have PAL or SECAM system VTRs, receivers, etc. in terms of usage efficiency, and it is difficult to obtain PAL or SECAM system equipment in these areas. be.

The present invention has been made in view of the above-mentioned circumstances. For example, a video tape recorded on a VTR or the like is used as a conversion medium, and the conversion medium itself such as the tape is used as a field memory, which is necessary for format conversion. The memory capacity should be very small (approximately compared to the number of line memories required by the digital conversion method).
1/60), the aim is to provide a compact and inexpensive magnetic reproducing device for color video signals, and to enable its use outside of broadcasting stations.

Another object of the present invention is to provide a magnetic reproduction device for color video signals in which a circuit for preventing a phase shift of a carrier color signal at the time of format conversion is extremely simply configured.

Hereinafter, preferred embodiments of the present invention will be described.
This will be explained with reference to the drawings. In addition, in this embodiment, as a video signal recording and reproducing device,
VTR and videotape are used as recording media, and 625/50 PAL to 525/60
We will explain the case of converting to the NTSC format, but the present invention can also be easily applied with a few changes by using a video sheet recorder, video disk device, etc., or when converting from the NTSC format to the PAL format. Of course, it can be applied to.

Here, from 625/50 PAL system to 525/60
When converting to NTSC format, change the number of fields.
Convert from 50 to 60 and increase the number of scanning lines (line number) to 625
It is necessary to convert from a book to 525 lines, and for color signals, to convert the carrier signal frequency and its vector components.

First, field conversion is performed by using a video tape, which is a recording medium for video signals, as a field memory. It has a scanning type rotating head device (see Figure 1).
It is preferable to use a VTR.

In the rotary head device 10 shown in FIG. 1, guide drums 3 and 4 fixed to a VTR chassis or the like are disposed above and below a rotary disk 2 to which a video head 1 is attached. A video tape 5, which is a magnetic recording medium, is guided by being wound diagonally (in a shape that becomes part of a spiral) around the guide drums 3 and 4 over an angular range of just over 180 degrees, and is driven to run in the direction of arrow B. be done. The rotating disk 2 is driven to rotate in the direction of arrow A by a motor 6, and two video heads 1 are attached near the periphery of the rotating disk 2 with an angular difference of 180 degrees from each other. There is. The tips of these video heads 1 slightly protrude from the outer peripheral surfaces of the guide drums 3 and 4, and magnetically record and reproduce video signals while being in sliding contact with the video tape 5, which is a magnetic recording medium. Alternatively, instead of using the rotary disk 2, either the upper or lower guide drums 3, 4 may be rotated, and the video head 1 may be attached to this.

The recording tracks formed on the video tape 5 by such a rotary head device 10 have a pattern as shown in FIG. 2, for example, and one recording track T records one field of video signals. Here, FIG. 2 shows recording tracks T ₁ , T ₂ , . . . recorded in the 625/50 PAL system. The recording tracks T are formed at a rate of 50 per second. Let the pitch of the recording track T at this time be p. Further, a control track T _c and an audio track T _s are formed near both edges of the video tape 5 in the width direction along the tape running direction. Note that two audio tracks _Ts may be formed for recording stereo left and right channel signals.

Next, when playing back the videotape 5 recorded in the PAL system shown in FIG. 2 in the NTSC system, the tape running speed is made equal to that during recording (therefore, the audio signal does not change). Rotating disk 2
is rotated at 30Hz (1800rpm). At this time, the tracking locus of the video head 1 (this is called a playback track. In Fig. 2, only the center locus is shown by a broken line) U is the five recording tracks _T1 to _T5.
6 tracks are arranged, and the pitch of this playback track U is 5/6p. Also, videotape 5 is 1/6
Since one reproduction track U is formed during the time interval of 0 seconds, the slope of the track also changes. For example, even if the starting ends of each track coincide with each other, as in the recording track _T1 and the reproducing videotape _U1 shown in FIG. 2, the ending ends are shifted by 1/6p.

Therefore, field conversion can be performed by reproducing the five recording tracks T ₁ -T ₅ with the six reproduction tracks U ₁ -U ₆ , and this can be performed using well-known tracking correction techniques. To explain an example of this tracking correction, for example, as shown in FIG. Head base 9
The head bases 9A and 9B are fixedly supported by the head bases 9A and 9B in a so-called cantilevered structure, and these head bases 9A and 9B are mounted and fixed on the rotary disk 2 with an angular interval of 180 degrees from each other. As the piezoelectric elements 8A and 8B, so-called bimorph plates formed by bonding two piezoelectric plates may be used. These piezoelectric elements 8
When a driving voltage is applied to A and 8B, video heads 1A and 1B are displaced in the direction of the rotation axis of rotary disk 2 (in the direction of arrow C), and this displacement direction is in the track width direction on videotape 5. Therefore, for example, for reproduction track U ₁ , at the same time as this one field is tracked, a drive voltage should be supplied to the piezoelectric element 8 so that the displacement in the track width direction changes linearly from 0 to 1/6p. Ba,
The video head 1 tracks the recording track _T1 as shown by the dashed line in FIG. 2, and accurately reproduces the recording track _T1 . Similarly, the reproduction track U ₂ is linearly displaced from 1/6p to 2/6p to accurately track the recording track T ₂ as shown by the dashed line in FIG. 2, and...
..., after displacing the playback track U ₅ from 4/6p to 5/6p and accurately tracking on the recording track _T5 , move the playback track U ₆ in the opposite direction from 1/6p to 0. It is displaced linearly and tracked again (overlappingly) on the recording track _T5 . The drive voltages applied to the piezoelectric elements 8A and 8B to obtain such displacement are as shown in FIG. In FIG. 4, the solid line and the broken line each correspond to one of the two piezoelectric elements 8A and 8B, and since they alternately share each field, they are driven for each track. The piezoelectric element is switching. This fourth
In the figure, U ₁ , U ₂ , ...... correspond to the playback tracks U ₁ , U ₂ , ...... in Fig. 2, and
Similarly, T ₁ , T ₂ , ...... are the recording tracks T ₁ , T ₂ ,
This shows the correspondence relationship with...

By the way, when reproducing recording track T ₅ overlappingly as in this example, the maximum value of the displacement amount by the piezoelectric element is 5/6p, but tracking correction is performed so that recording track T ₃ is reproducing overlappingly. If this is done, the maximum displacement amount will be 3/6p. That is,
Displace the regeneration track U ₃ linearly from 2/6p to 3/6p, and move the regeneration track U ₄ in the opposite direction.
It is sufficient to linearly displace it from 3/6p to 2/6p, and as shown in FIG. 5, the driving voltage can be small. The solid line and broken line in Fig. 5 are also 2 as in Fig. 4.
The drive voltages are shown corresponding to the piezoelectric elements 8A and 8B, respectively, and the drive voltages are also shown for the sections in which the video head does not actually reproduce, but as in FIG. It is only necessary to obtain a linear voltage change as shown in the figure.

By repeating the tracking correction described above, it is possible to convert a video signal of 50 fields per second to 60 fields per second, but as a result, the output from video heads 1A and 1B is equal to It becomes a 625/60 signal, which is frequency-converted by 6/5 times.

In addition to tracking correction using piezoelectric elements as described above, it is also possible to mechanically change the height of the video head using a cam or the like, or to mechanically displace the tape guide pole. .

Next, FIG. 6 is a block diagram schematically showing the overall configuration of an embodiment according to the present invention. In FIG. 6, pulse generators 11A and 11B provided in relation to the rotation axis of the rotary disk 2 are used to generate video heads 1A and 1 according to the rotation of the rotary disk 2.
A detection pulse is generated in response to the contact of B with the video tape 5. These pulse generators 11A, 1
The detection pulse from 1B is the flip-flop 1
2 and the motor control circuit section 13. The motor control circuit section 13 is supplied with a 30Hz reference signal from the input terminal 14, which is compared with the detection pulse, and then sent to the motor 6 for driving the rotary disk 2. Drive and control rotation. Here, each video head 1A, 1
The signal from B is sent to the playback head amplifier 15 via a slip ring or rotary transformer.
A and 15B are sent to the changeover switching circuit 16, respectively. This switching circuit 16 is supplied with the output from the flip-flop 12 as a switching control signal, and each video head 1A, 1B is connected to a video tape 5.
The switching operation is performed in accordance with the alternate reproduction of one track above. The output from the flip-flop 12 is also sent to a signal processing circuit 17 for driving and controlling a piezoelectric element such as a bimorph, and this signal processing circuit 17 uses a driving voltage as shown in FIG. 4 or 5. are supplied to the piezoelectric elements 8A, 8B via amplifiers 18A, 18B, respectively. This signal processing circuit 17 includes a CTL
A CTL signal from head 19 is also supplied.

Here, the reproduced video signal from the output terminal 20 of the switching circuit 16 is a 625/60 signal whose frequency is multiplied by 6/5, as described above.
This signal is subjected to line conversion and color conversion processing to obtain a regular NTSC signal. here,
When converting from 625/50PAL system to 525/60NTSC system, the reproduced video signal from the output terminal 20 of the switching circuit 16 is sent to the luminance signal/color signal separation circuit (Y/C separation circuit) 21,
Separate the color signal, and for this color signal,
Color conversion circuit section 22 and frequency conversion circuit section 2
3, and then sent to the line conversion circuit section 24. Furthermore, in this embodiment, an automatic color video signal format discrimination device 30 is provided that automatically determines whether the videotape to be played back is recorded in the PAL format or the NTSC format. ing.

This color video signal system automatic discrimination device 30
is between one field (1V) in the playback video signal.
It automatically determines whether it is 262.5 or 312.5 by counting the number of H's (between). This can be easily achieved by separating and counting the synchronization signal of the reproduced video signal from the output terminal 20 of the switching circuit 16 using the synchronization separation circuit 31.

That is, FIG. 7 shows this system automatic discrimination device 30.
FIG. 8 is a block circuit diagram showing a specific example of this, and the output waveforms at each point A to E in FIG. 7 are shown in FIGS. 8A to E. The reproduced video signal obtained from the output terminal 20 is passed through a synchronization separation circuit 31 to an automatic system discrimination circuit 3.
0 and is sent to the vertical synchronizing signal separation circuit 32 and the horizontal synchronization signal separation circuit 33. The vertical synchronization signal from the vertical synchronization signal separation circuit 32 (see FIG. 8A) triggers the monomulti 34, which outputs a pulse having a pulse width of, for example, about 20H (see FIG. 8B). ) is output and sent to the counter 35. This counter 35 is supplied with the horizontal synchronizing signal from the horizontal synchronizing signal separation circuit 33, and counts, for example, 256 (=2 ⁸ , ie, 8 bits) horizontal synchronizing pulses to generate an output. Here, this counter 35
is reset by a pulse with a width of about 20H from the monomulti 34, and enters the 0 state at which the count starts, so that 276 (=256 +
The output occurs when 20) horizontal sync pulses are input (see Figure 8D). Therefore, the playback video signal from the output terminal 20 is 312.5H for 1V.
If it is a 625/50 signal, an output as shown in FIG.
7, a discrimination signal of, for example, "H" (high level) is obtained. In contrast, the playback video signal
If the 625/60 signal is 262.5H between 1V and the vertical synchronization signal is supplied before the counter 35 completes counting, the output from the counter 35 will be as shown in Figure 8E.
As shown in FIG. 3, the discrimination signal remains unchanged at 0 level, and the discrimination signal obtained from the system discrimination output terminal 37 via the rectifier circuit 36 becomes, for example, "L" (low level).

The method discrimination signal obtained in this way is
As shown in the figure, the signal is supplied to a signal processing circuit 17 for driving a piezoelectric element, a color conversion circuit section 22, a frequency conversion circuit section 23, and a line conversion circuit section 24. A switching operation is automatically performed to determine whether to perform conversion or to directly supply the signal to the video circuit section, etc., without converting the format.

Next, line conversion and color conversion will be explained. In the case of PAL→NTSC conversion, color conversion is performed in a low frequency subcarrier state before line conversion, so this color conversion will be explained first.

Here, in video signal recording by VTR used in this example, Y (luminance signal) is FM
The C (color signal) is converted to a low frequency and recorded. For PAL, the color signal frequency (frequency of the carrier color signal) is chosen to be (44-1/8) _H ( _H is the horizontal sync frequency), and its vector components consist of F, F ^* components, and the scanning line It can be switched every time. In the case of NTSC, the frequency (frequency of the carrier color signal) is selected to be (44-1/4) _H . Therefore, the carrier color signal frequency _C in the reproduced video signal obtained from the reproduction output terminal 20 of this embodiment
is (44-1/8)×6/5 _H(PAL) (however _{, H(PAL)}
is the horizontal sync frequency of the PAL system), which is approximately 823KHz.

Such an 823 KHz ( _C ) color signal having F and F ^* components in the reproduced video signal is subjected to frequency conversion at 2 _C in the color conversion circuit section 22 to perform F←→F ^* conversion. From these two signals, the F component is selected for each scanning line and the low-frequency NTSC
Signal. This color signal (carrier color signal) is
The frequency conversion circuit unit 23 converts the frequency to an integral multiple of _H and sends it to the line conversion circuit unit 24.
This is to match the phase between lines when thinning or repeating lines in line conversion (described later). In this embodiment, the signal frequency from the frequency conversion circuit section 23 is _91H ( _H is horizontal synchronous frequency). The color signal subjected to line conversion in the line conversion circuit section 24 is
The frequency is converted by the frequency conversion circuit 25 to 3.58MHz, which is the regular NTSC carrier color signal frequency, and becomes an NTSC color signal.

In addition, NTSC → PAL color conversion is also 91
Convert the frequency to _H and send it to line conversion. After line conversion, frequency conversion to 4.43MHz and further F
←→F ^* conversion, switching the F and F ^* components for each scanning line, resulting in a PAL color signal. However, in this case as well, frequency conversion is performed to make the frequency of the carrier color signal an integral multiple of _H before line conversion.

A specific example of such a color conversion circuit section 22 and frequency conversion circuit section 23 is shown in FIG.

In FIG. 9, a color signal separated by the Y/C separation circuit 21 is supplied to an input terminal 50. This color signal is sent to the color conversion circuit section 22 to perform the above F←→F ^* conversion, but this is done by sending a signal whose phase of the above color signal is inverted by 180 degrees to one switching terminal a of the switching switch 51. This can be done by sending the color signal as is (however, via the attenuator 52) to the other switching terminal b, and switching the changeover switch 51 for each scanning line. The above 180° phase inversion can be performed by adding a signal of 2 _C to the carrier color signal of frequency _C using a frequency converter 53 such as a balanced modulator, and the unnecessary frequency generated during this frequency conversion can be A low-pass filter 55 for removing components (such as the 3 _C component) may be provided on the output side of the color conversion circuit section 22.

Here, the flip-flop 54, PLL system 60, etc. provided in connection with the color conversion circuit section 22 are circuits for obtaining a switching control signal for the changeover switch 51, a _2C signal to the frequency converter 53, etc. This is used to synchronize with the H and V synchronizing signals in the reproduced video signal, and to compensate for discontinuities in phase inversion for each H signal caused by overlapping reproduction during field conversion. To briefly explain these related circuits, the horizontal synchronization signal from the horizontal synchronization separation circuit (for example, the circuit 33 in FIG. 7 may be used) is sent to the clock signal input terminal of the D flip-flop 54, the delay circuit 56, and
The signal is sent to the PLL circuit 57. Further, a part of the output from the frequency converter 53 is sent to the burst gate 59 via a bandpass filter 58 whose passband is near 3 _C , and the burst signal is sent to the phase comparator 61 of the PLL system 60. It is being The burst gate 59 is gate-controlled by a signal obtained by delaying the horizontal synchronizing signal by a delay circuit 56. In the PLL system 60, the output of a frequency converter 63 such as a balanced modulator, into which the signal from the PLL circuit 57 and the signal from the variable frequency oscillator 62 are input, is passed through a bandpass with a passband near _6C . 3 _C via filter 64 and 1/2 frequency divider 65
This signal is sent to the phase comparator 61 through a bandpass filter 66 near _3C . The phase comparator 61 compares the phase of this _3C signal with the signal obtained through the burst gate 59 and sends an error detection output to the variable frequency oscillator 62. Furthermore, an unstable multivibrator 68 that supplies a 1/2 _H rectangular wave signal to the D input terminal of the D flip-flop 54 is connected to a circuit 6 for tuning to 1/2 _H using the error detection output.
The operating state is determined according to the output from 9, and discontinuities in phase inversion, etc. are corrected. Further, the _6C signal output obtained from the frequency converter 63 via the bandpass filter 64 is frequency-divided by a 1/3 frequency divider 67 to become a _2C signal, which is further divided into a band with a passband near _2C . The signal is supplied to the frequency converter 53 of the color conversion circuit section 22 via a pass filter 67'.

Next, the color signal subjected to the above F←→F ^* conversion by the color conversion circuit section 22 is sent to the frequency conversion circuit section 23, and the horizontal synchronization frequency is
It is converted into a carrier color signal with a frequency of an integer multiple of _H , for example 91 _H. In this case as well, it is sufficient to consist of a frequency converter 41 such as a balanced modulator and a filter 42 such as a bandpass, and a PLL system 43 for phase matching with the H signal of the reproduced video signal etc. may be provided. good. This PLL system 43 is the burst gate 4
4, a phase comparator 45, a reference oscillator 46, a variable frequency oscillator 47 such as a VCO, a frequency converter 48 such as a balanced modulation, an AFC circuit 49 that operates according to the H signal input of the reproduced video signal, and a filter 4.
8' etc. Therefore, irregular values such as 1/8 _H at the frequency (44-1/8) _H of the carrier color signal in the reproduced video signal are eliminated,
Since the frequency is converted to an integral multiple of _H (91 _H ), problems such as phase shift do not occur during the next stage line conversion. In the case of NTSC→PAL conversion, the color signal of the reproduced video signal is frequency-converted to an integral multiple of _H (such as 91 _H ) (without color conversion), line conversion is performed, and then color conversion is performed.

Next, line conversion will be explained in order of its principle and specific configuration example.

First, Figure 10 is a block circuit diagram showing a basic configuration example for explaining the principle of line conversion.
Figure 1 is a time chart for explaining its operation. Here, for 625 → 525 line conversion, 100
It is necessary to thin out lines, and from 625:525 = 25:21, 4 lines are thinned out every 25 lines to make 21 lines. This results in thinning out one line every six lines.

That is, the line conversion circuit section 2 shown in FIG.
4 is a sequence controller 80 for memory control, which sequentially writes the color video signal supplied to the input terminal 70 into a plurality of memory elements 71, 72, etc. such as CCDs in units of one horizontal period (in units of 1H). Accordingly, these memory elements 71, 72,
......and the changeover switch 81 to control the 25H
Every time, 4H is dropped and read out, and output to output terminal 27.
It is sending a 525/60 signal. This sequence controller 80 is supplied with a memory read clock from a PLL circuit 82 whose phase is locked to a synchronization signal etc. in the reproduced video signal.
A signal from a 525/60 master oscillator 83 is also supplied. This line conversion circuit section 24 includes a time base correction device (TBC: Time base correction device) using each memory element 71 etc. as a 1H analog memory.
Base Corrector). 625/60 of input
The periods of the 25 lines and the 21 lines of the output 525/60 are almost the same, so to thin out 4 lines from the 25 lines to make 21 lines, you need 3 lines (3H minutes).
However, during field conversion, the difference between tracks caused by the 625/50 tape pattern is 3.47±0.5H, and the time base error absorption is also included for 8 lines (8H). ) memory elements 71, 72, ......, 7
We have prepared 8.

Memory elements 71, 7 for these 8 lines
2, . . . , 78 is used to thin out four lines as follows. Figure 11 B ₁ , B ₂ ,...
..., B ₈ , each memory element 71,
72, . . . , 78 sequentially perform writing (see section W) and read (see section R). In this case, for example, when writing, the
Certain 4 out of 25 lines on the 625/60 signal side (e.g. 3rd, 9th, 15th and 21st)
jumps, writes, and reads 21 lines.
This is repeated in units of 25 lines, resulting in 625→525 conversion.

Furthermore, a line interpolation circuit section 84, which will be described later, is provided upstream of the line conversion circuit section 24.

The above is an example of 625→525 conversion, but in 525→625 line conversion, 21 lines are converted to 25 lines, so one line is repeated approximately every 5 lines. This means that when reading from a memory device such as a CCD, 4 out of 25 lines are jumped and read out. Signals are inserted into the four lines where signals are missing by line interpolation, which will be described later. Therefore,
The line interpolation circuit section is arranged after the line conversion circuit section.

Also, the gap between tracks, 3.47H or 2.43H, caused by field conversion is processed during vertical planking.

In one field, the addresses of eight memory elements such as CCDs are fixed. This is a CCD
This is to fix the variation in characteristics on the screen and visually reduce it, but in reality it seems to be almost invisible.

The setting of the CCD address in the above line conversion, the setting of lines to be thinned out or lines to be repeated, and the setting of the line interpolation ratio are controlled by 1 Kbyte ROM data.

Next, the principle of operation of the line interpolation circuit section 84 shown in FIG. 10 will be explained. The ideal line interpolation is
Since it is difficult for the purpose of the present invention, the delay circuit 85
1H delay signal from and the original (without delay)
The reproduced video signal is linearly interpolated at a ratio of 1:1.
That is, in FIG. 10, a plurality of resistors 8 are connected between the input terminal 70 and the output terminal of the delay circuit 84.
6a, 86b, . . . are connected in series, and the output signal from each connection point of these resistors 86a, 86b, . , I am sending it to... This changeover switch 87 is also controlled by the sequence control 80 described above.

FIG. 12 is a graph showing linear interpolation in the case of 625→525 conversion, with time on the horizontal axis and relative amplitude of the video signal on the vertical axis. This is 6τ ₁ = 5τ
₂ , where τ ₁ is 1H of the reproduced video signal
The period τ ₂ is a 1H period corresponding to the regular NTSC system after line conversion. In the figure, the t ₁ point requires only the h ₁ component, but the t ₂ point has 80% of the h ₂ component and 20% of the h ₁₃ component.
%, and the interpolation ratios are 80%, 60%, 40%, 20
%, 0%. In this embodiment, the interpolation ratio is simplified into four types: 75%, 50%, 25%, and 0%.

Line interpolation is performed before line conversion in 625→525 conversion. This is because the signal to be thinned out is also used since the information is thinned out starting from the side with the most information. vice versa
525→625 conversion is performed after line conversion.

Such line interpolation serves two purposes.
One is to make it appear as if it were at the desired position when viewed with the naked eye, even if a signal is missing or overlapped at a certain position due to line conversion. This uses the linear interpolation described above. FIG. 13 shows line interpolation in the case of 625→525 conversion in terms of correspondence with each line before and after line conversion. As is clear from FIG. 13, the distorted original signal H ₀ and the 1H delayed signal H ₁ are interpolated so that the distortion is geometrically reduced, and as shown by the broken line in the figure, Approximate to a straight line. here,
The % number in the right column of the figure indicates the interpolation ratio of the H ₁ signal.

Another purpose is field conversion, where when one track is played repeatedly or thinned out, the order of odd and even fields is disrupted and interlacing is disrupted.

This appears as a 0.5H vertical shake on the screen. Therefore, for fields where the input and output odd and even fields do not match, the interpolation ratio is shifted by 50% (shifting by 0.5H on the screen) to maintain interlace (see ( ) in the right column of Figure 13). reference.).

It should be noted here that since the line-interpolated signal has a spread compared to the original signal, deterioration in screen resolution cannot be avoided.

For example, the memory element 71 used for line conversion as described above is specifically 455 bits.
Dual type CCD (for one line)
Just use it. That is, to transmit a video band, a 910-bit configuration is normally used, and a transfer clock that is four times faster than the 3.58 MHz NTSC subcarrier results in a 1H delay of 525/60 signals.

In this embodiment, in order to simultaneously transmit a luminance signal and a color signal using the same CCD, Y+C and Y-C are used as input signals, and each is 180 degrees
Using the shifted transfer clock, the sum and difference of the outputs are calculated to obtain the Y output and the C output.

That is, in FIG. 14, the input terminal 70Y
is supplied with the luminance signal Y, and the input terminal 70C is supplied with the color signal C that has been color-converted (and frequency-converted) as described above.
The signal and the C signal are added by an adder 91 to yield Y+C.
The signal is subtracted by a subtracter 92 to become a Y-C signal. Dual type memory element mentioned above
The CCDs 71, 72, ...... are memory portions 71A, 71B, 72A, 72B of 455 bits, respectively.
The Y+C signal is supplied to one of the two divided CCDs, and the Y-C signal is supplied to the other. These CCD parts 71A,
71B, 72A, 72B, ...... are 180 each other
゜Out-of-phase transfer clock φ(0), φ(π)
However, the configuration is such that the C signals between adjacent CCDs are equivalently inverted in phase and the C signals are interleaved.

That is, dual type CCD71, 72,
73, one CCD part 71A, 72 of...
The transfer clock of A, 73A, ...... is φ(0),
The other CCD portion 71B, 72B, 73B,...
Let the transfer clock of … be φ(π) (these φ
(0) and φ(π) are 180° out of phase with each other. ), φ(0) of dual type CCD71
A Y+C signal is sent to the CCD section 71A driven by
The Y-C signal is supplied to the CCD section 71B driven by φ (π), and then the dual type
CCD part 72 where φ(0) of CCD 72 is input
The Y-C signal and φ(π) are input to A.
The Y+C signal is supplied to the CCD portion 72B, and the correspondence relationship between the transfer clocks φ(0) and φ(π) with respect to the Y+C signal and the Y-C signal is sequentially reversed. Also, driven by φ(0)
The outputs from the CCD sections 71A, 72A, 73A, . . . are sent to the changeover switch 81A, and the CCD sections 71B, 72B, 73B, . . . are driven by φ (π).
The outputs from the switches 81A and 81B are respectively sent to the changeover switches 81B, and the outputs from these changeover switches 81A and 81B are added by an adder 93 to form a Y signal, which is sent to the output terminal 27Y, and subtracted by a subtracter 94 to become a C signal. and are sent to the output terminal 27C.

In the specific circuit configuration example shown in FIG. 14, first, let's look at the operation of the dual type CCD 71 for 1H (1 line).
As shown in FIG. 15a, the output spectrum of the Y+C signal from the CCD section 71A includes positive amplitude Y and C components, as well as positive amplitude Y' and C' components that are folded components of these Y and C components. exists. In addition, the output spectrum of the Y-C signal from the CCD section 71B is as shown in FIG. ), and as aliasing components of these Y and C components, there are a Y' component of negative amplitude and a C' component of positive amplitude. Therefore, if these Y+C output and Y-C output are added by the adder 93, a Y output from which the aliasing component Y' component is eliminated is obtained as shown in FIG. 15c, and the subtracter 94, the C output from which the C' component has been eliminated is obtained as shown in FIG. 15d. The C' component and Y component in these Y and C outputs can be easily removed by passing through a low-pass filter or the like. In other words, this method can reduce the number of CCD bits used by half compared to transmitting Y and C separately.
As shown in Figures 5c and 5d, this has the advantage of being able to cancel aliasing components that appear in the output.

Next, multiple dual type CCD71,7
2, . . . are connected as shown in FIG. 14, the interleaving of the C signal will be explained with reference to FIG. 16. 16a shows the C component of the Y+C signal, FIG. 16b shows the C component (-C component) of the Y-C signal, FIG. 16c shows the transfer clock φ(0), and FIG. 16d shows the C component of the Y+C signal. is the transfer clock φ(π)
are shown respectively. Here, for example, when the C signal of the first line is supplied to the dual type CCD 71 and sampled, the sampling positions are the points ○ and ● in FIG. 16a and b,
The sampling positions for the next second line are the points △ and ▲ in Figure 16 a and b. Thereafter, each line is sampled alternately at the points 〇 and ● and the points △ and ▲, so that the C signals between adjacent lines are equivalently inverted in phase.
Each line l ₁ , l ₂ , l ₃ ,
...... Above, the C signal is interleaved between adjacent lines as shown at each point x. Therefore, CCD
Variations in characteristics between each image are reduced, and image quality is improved.

Furthermore, regarding the transfer clock for driving the CCD, a resistor 96 and a coil 97 are inserted and connected between the clock driver circuit 95 provided in the sequence controller 80 and the CCD. As shown in Figure 18, this is the CCD71
The input capacitance 98 such as A is used as one element of the filter, and the resistor 96 and This is because by externally attaching the coil 97, a delay line having a second-order or higher-order filter configuration is constructed. The external resistor 96 is mainly used for damping, and the external coil 97 is combined with the CCD input capacitor 98 and the line-distributed constant circuit 100 to form a second-order or higher-order filter. Therefore, the rising edge of the transfer clock can be stabilized and spike noise can be removed.

According to the magnetic reproducing device for color video signals having the above configuration, the memory capacity required for the circuit section etc. is reduced because the format conversion is performed through a recording medium such as the cassette tape of the cassette type VTR which is currently extremely popular. Compared to other conventional format conversions, it is very easy to use, has a simple configuration, can be supplied at low cost, and has features such as good image quality, easy operation, and simple maintenance, making it popular among dubbing houses and international companies. ,
Possible applications include broadcasting stations, etc.

Also, before performing line conversion, the frequency of the carrier color signal is set to an integer multiple of the horizontal frequency _H (for example, 91 _H ).
Since the frequency is converted to , phase shift of the carrier color signal at the time of line conversion can be effectively prevented with a simple circuit configuration. For example, if _line conversion is performed with the frequency unchanged at (44-1/8) Considering that the configuration of the frequency conversion signal that compensates for the wavelength is required and the circuit becomes complicated, it can be seen that this method is extremely useful.

Note that the present invention is not limited to the above-mentioned embodiments, and is applicable to NTSC→PAL format conversion or
SECAM method and NTSC method (or PAL method)
It can be easily applied to system conversion between

[Brief explanation of the drawing]

All figures show one embodiment according to the present invention.
FIG. 2 is a perspective view showing an example of a rotary head device of a video tape recorder; FIG. 2 is a plan view showing recording tracks and tracking trajectories on the video tape;
FIG. 3 is a perspective view showing the rotary disk in FIG. 1, FIG. 4 is a time chart showing an example of the piezoelectric element drive voltage waveform for tracking correction, and FIG. 5 is a similar diagram showing the piezoelectric element drive voltage. 6 is a block circuit diagram schematically showing the overall configuration of an embodiment of the present invention. FIG. 7 is a block circuit diagram showing an example of a PAL/NTSC system discrimination device. Figure 8 is a time chart for explaining the operation of the system discrimination device, Figure 9 is a block circuit diagram showing a specific example of the configuration of the color converter, and Figure 10 is a basic diagram for explaining the principle of line conversion. A block circuit diagram showing a configuration example, FIG. 11 is a time chart for explaining line conversion operation, FIG. 12 is a graph for explaining the interpolation ratio of line linear interpolation performed simultaneously with line conversion, and FIG. 13 is a time chart for explaining the line conversion operation.
The figure is a graph showing the correspondence between the converted line and the converted line when line conversion is performed by line linear interpolation, Figure 14 is a block circuit diagram showing a specific example of the configuration of the line conversion circuit section, and Figure 15 is A graph showing the output spectrum to explain the operation of a CCD, which is a memory element, is shown in Figure 16.
A time chart showing the positions at which color signal components are sampled on the CCD, Fig. 17 a plan view showing interleaving between adjacent lines on the playback screen, and Fig. 18 a circuit diagram showing a specific example of the clock circuit section of the CCD. be. DESCRIPTION OF SYMBOLS 10... Rotating head device, 22... Color conversion circuit section, 23... Frequency conversion circuit section, 24... Line conversion circuit section, 30... System discrimination circuit section.

Claims (1)

[Claims] 1. When reproducing a recording medium in which one field of a color video signal having a first field frequency and a line frequency corresponds to one recording track to form a plurality of recording tracks, the reproducing magnetic head means for converting the number of fields by reproducing the color video signal of a predetermined number of fields from the plurality of recording tracks by missing or duplicating the recording track; and writing the color video signal converted by the number of fields into a memory device. A means for controlling readout of the device and reading video signals of a predetermined number of horizontal periods with omissions or overlaps to convert the number of lines; means for converting the synchronization frequency to an integral multiple of the synchronization frequency, so as to obtain a color video signal having a second field frequency and a line frequency in which the phase shift of the carrier color signal is corrected from the output of the memory device. A magnetic reproducing device for color video signals.