JPS62292075A - Image signal binarization processing system - Google Patents

Abstract

PURPOSE:To reproduce a faithful IMAGE by means of binarizing accurately by binarizing according to a binarization level which is decided by peripheral picture element data. CONSTITUTION:Picture elements a, b, c and d are decided as 1, 1, 0 and 1 respectively and 110100010 which is made by combining data VD=000010 and a signal VS=1101 decided from the state of the picture elements a, b, c and d when digital picture element data VD is 000010 is accessed to a ROM1 as an address. Meanwhile in the ROM 1 the level of 1 and 0 which should be decided corresponding to the value of the data VD and the value of peripheral condition VS was stored previously, so that the level of 1 and 0 can be decided accurately. Thus by binarizing accurately a faithful IMAGE can be reproduced.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an image signal processing device in an image reading device using an image sensor, and particularly relates to a binary signal processing device for a white background portion and a black background portion. This invention relates to a binarization processing power formula for an image signal consisting of information.

[Conventional technology]

When a document is read by an imaging device such as an MO8 image sensor or a CCD image sensor, a time-series image signal (D M TF (
Modulation Transfer Function
ion (resolution) depends on the optical characteristics of the optical system that forms the original image on the imaging device and the electrical characteristics of the imaging device itself.

FIG. 10 shows time-series image signal voltages output from a certain imaging device when the original is read and scanned by the imaging device.

FIG. 10(a) shows the state of the document on the reading scanning line of the imaging device, and shows the white area Wl-w%0. It has black background portions B1 to B9. Figure 10(b) shows the first
0 shows a time-series image signal S obtained when reading a patterned original as shown in FIG. 0(a). This 10th
As shown in Figure (b), the waveform of the single image voltage S is not binarized, such as "0" corresponding to the white background part and "1" corresponding to the black background part, due to the characteristics of the MTF. A situation arises.

Places where there are many black parts and few white parts 0
For example, “1” corresponds to the white background portion W2 in FIG. 10(a).
K is set so that the image signal voltage output, which should rise to the level of ``, rises only by about half. On the other hand, there are many white areas and few black areas.

For example, at the location B3 in FIG. 10, the image signal voltage that should be lowered to the "0" position corresponding to the black background portion B does not drop sufficiently.

Therefore, when level RA is binarized as a comparison reference signal voltage, 1 is originally "white", and W should be determined as "1".
Part 2 becomes "0".

Conversely, when level RB is binarized using the comparison reference signal voltage, B should be determined as "0" as black.

B4. Parts such as B, , B, etc. will be determined as "1".

In addition, when black and white appear alternately after a relatively long white background part W4, the black background part.

Similarly, for the alternating appearance of black and white after a relatively long black background part B7, the part corresponding to the white background part is sufficiently lowered to the "1" level. It doesn't rise.

To solve this problem, two comparators with different thresholds are used, and when a common analog image signal input increases or decreases beyond a predetermined level, a high level and a low level threshold are set, respectively. A binarization circuit has been proposed in which the output level of the comparator to which the value has been set is used to selectively output the output of the comparator (Japanese Patent Publication No. 16316/1983, Japanese Patent Publication No. 16316/1983). (See Publication No. 38791).

Figure 9 shows an example of this, with two comparators 30.3
1, respectively, and the voltages and V, (V.

>V+) is set as the threshold value. 32 is a selector, and the common analog image input is the threshold level V.

When the threshold level is exceeded, the comparator 31 at the threshold level is activated, and when the common analog image input becomes less than the threshold level, the comparator 30 at the threshold level is activated.

According to such a binarization circuit, it is possible to faithfully reproduce both a thin black line on a white background and a thin white line on a black background.

[Problem that the invention seeks to solve]

Although it is possible to reproduce a fairly faithful image using the conventional examples described above, all of the examples described above capture the change in the state of the image signal only from one direction, and the characteristics of the 91 image, that is, the two-dimensional The problem is that it does not take into account spread and is still insufficient.

In addition, in the conventional example described above, the comparator is selected depending on the analog level, that is, the comparator is selected by analog means, and the comparator circuit is complex and has a problem that it has poor expandability for things such as halftone reproduction. Was.

[Means and operations for solving the problem] In order to solve the above-mentioned problem, in this invention, the pixel of interest '5
c When performing binarization, the binarization level is determined in consideration of data of two-dimensional surrounding pixels, and the binarization is performed.

This makes it possible to correct the image signal taking into account the two-dimensional spread of the 91 image, and eliminates errors when binarizing the image signal, such as a slight black background on a white background or a slight white background on a black background. It can be reduced to a large width.

More faithful image reproduction is possible.

〔Example〕

The present invention will be described in detail below with reference to the drawings.

FIGS. 1 and 2 are diagrams showing the principle of this invention. In the figure, 1 is a ROM, and a binary value of "1" or "0" is stored depending on the address described later. 2
is a buffer memory section which stores the binarization results of pixels that have already been binarized. As shown in FIG. 2, one pixel a, b, c.

Assume that there are pixels d and e, one pixel a, b, c, and d have already been binarized, and nine pixels e are to be binarized.

At this time, as described above, 0 pixels a, b, c.

The binarized data of d is stored in the buffer memory section 2. These pixels a and b.

The ROMI is read out using the binary data vs regarding c and d and the digital image data VD of 9 pixels e as addresses.

ROMI receives a signal from the backup memory section 2.

For example, pixel a surrounding pixel e to be determined.

The binary data determined by the data at that time is placed at the address position determined by the respective binary data b, c, and d and the digitized read data from the sensor of one pixel e, that is, the digital image data VD. Memorize it in advance. For example, if the read data from the sensor of one pixel e is composed of 6 bits, the digital image data Vo will have 26 levels, that is, 0 to 63 levels, but the pixel e decomposed into these 64 levels The digital image data Vo of 1 is divided into already determined pixels a, b, and c.

It is determined to be "1" or rOJ depending on the state of d.

To give a specific example, pixels a, b, c, and d are r
It has been determined that lJ rlJ roj rlJ, and the digital image data ■. is "000010", the signal V determined from the states of 9 pixels a, b, c, and d
s=1101 and digital image data Vo=00001
For example, the combination of 0, the value of ``11010'' and 9, because the levels of rlj and rOJ that should be determined according to the surrounding situation, that is, the VsO value, are stored in advance, this makes the correct ``1''.

The level of rOJ will be determined. In the above example, "At address 110100010j.

If "0" is stored, "0" will be obtained as the output Vis.

FIG. 3 shows a specific example of the buffer memory section 2. As shown in FIG. The buffer memory section 2 includes a line memory 3.1 bit latches 4, 5.6, and an encoder 7 as required. The line memory 3 stores pixel data (already binarized) for one line before the line currently being scanned, and includes 1-bit latches 4, 5.6.
is currently being read and stores the data of pixels surrounding the pixel to be binarized. In the above example, line memory 3
, one line of data consisting of pixels a, b, c, . 1 bit
The ratte 6 holds the data of one pixel d and outputs it. Each data a, b.

c and d are ROMI as 4-bit data storage.
However, as shown in FIG. 3, this address is once input to the encoder 7.

It is also possible to use the ROM1 address after converting it to 2-bit data.

When the encoder 7 is used, the capacity of the ROM 1 can be reduced slightly, but the adjustment becomes coarser.

For example, the encoder 7 is 1, roj, rlJ
It is conceivable to decide based on the number of "1" data among the data in , or to use only b and d as data, which are considered to have the strongest influence on the readout level of e, but there are other methods. Of course, it is also good.

In this case, if pixel e is binarized using only pixel d, the same effect as the above-mentioned conventional technique can be achieved with one ROM and one ROM.
This can be achieved with a single bit latch.

Note that density adjustment may be made possible by adding a 1-bit or 2-bit density designation signal to the address signal to the ROMI. With 1 bit, it is possible to adjust in 2 stages,
With 2 bits, adjustment in 4 stages is possible, but the required capacity of the ROMI increases accordingly.

Also, if the ROMI is configured with RAM and the data is written before inputting the 9-picture signal.

Adjustment characteristics can be realized as needed each time.

Furthermore, if a threshold value that changes periodically is added as an address to the ROMI, it becomes possible to perform binarization according to the threshold value that changes periodically, and pseudo halftone reproduction becomes possible.

FIGS. 4 and 5 are diagrams for explaining a second embodiment of the invention. In this example.

A binarization level is determined based on the sum of surrounding pixels.

For example, when determining the binarization level of pixel e in FIG. 4, the sum of data up to pixel 21-f, which is a surrounding pixel, is calculated, and the level at which the binarization should be performed is determined based on this result.

FIG. 5(a) shows an embodiment for realizing the above-mentioned functions. In FIG. 5, 11 is an A/D converter;
2 is a line memory, 13 and 14 are latches, 15 is an adder, 16 is a binarization level generator that generates a level for binarization, and 17 is a comparator.

Now, we have an analog picture signal ship as shown in Figure 5(b).

Image signal white level reference signal Vw and black level reference signal ■p
is converted into a digital value by the A/D converter 11 based on the reference value. Line memory 2 for holding previous line data
Input this A/D conversion output into .

The data of pixels a, b, and c, which are peripheral pixels of the previous line, are read out and latched into the latch 13. On the other hand.

The pixel data d, e, f of the current line is latched into the latch 14, and added to the adder 1 along with the data from the latch 13.
In addition to 5, find the sum.

From this total data, a binary level generator 6 generates a binary level. Binarization level generator 16 is ROM
Alternatively, it is configured with RAM, and the output (digital value) of the adder 15 is used as the address input.

The binarization level at that time may be written in that address.

The output of the binarization level generator 16 is used as one input of the comparator 17, and the data of the pixel e is added thereto to obtain the determined binarization level Be of the pixel e.

For example, the digital output of the A/D converter 11 has a 6-bit configuration, and the memory has 4 bits per pixel. Adder 1
5 adds six pieces of 4-bit data, resulting in a maximum of 7-bit output, of which the upper 5 bits are input to the binarization level generator 16. These top 5 bits are
Binarization level generator 16 configured with ROM or RAM
input the address and output a 6-bit output.

Therefore, in a memory with a 32x6 bit configuration, 3
Outputs two types of binarization levels. In this case, it goes without saying that all pits may be used instead of the upper 5 bits.

The contents of the memory are as shown in FIG. That is, the values at that time are stored in the memory so that the binarization level is determined according to the relationship shown by one curve (A) when the upper five bits of the input total are taken on the horizontal axis.

Further, as the address of this memory, it may be possible to input a signal (binary number) that can be selected from several types from the outside. For example, if the curves shown in FIGS. 7(b), (c), and 7) can be selected, they can be used to adjust the density to make it darker or tingle.

The density adjustment signal shown in FIG. 5 is an example used for this purpose, and is input to the binary level generator 16. If the density adjustment signal is composed of 2 bits, curves up to class 4ai can be selected.

FIG. 8 shows still another embodiment, in which the reference voltage of the 9-image signal Vs set to an arbitrary value using a volume controller or the like is used as the binarization level. In FIG. 8, a constant voltage VC is divided by a regulator 24.

After this is converted into a digital value by the A/D converter 21, it is latched into the latch 22 using the start signal ST.

This is set as one input of the comparator 23. If the image signal Vs, which is the other input of the comparator 23, is binarized according to the value from the latch 22, the volume 24
The binarization level can be arbitrarily adjusted by adjusting . By utilizing this, for example, the operator can select a suitable binarization level according to the shading of the read document using a manual.

In addition to determining the binarization level according to the surrounding situation, if it is possible to select the binarization level according to the shading of the document, more fine-grained binarization becomes possible.

〔Effect of the invention〕

As described above, according to the present invention, when binarizing a certain pixel, it is possible to consider not only the data immediately before it, but also the data of surrounding pixels with a two-dimensional spread. Therefore, correct binarization is possible, and when used in a copying machine or the like, the original can be accurately copied.

In addition, the circuit is relatively simple, the density can be easily adjusted, and it is also easy to perform binarization with manual adjustment by the operator.

[Brief explanation of drawings]

FIG. 1 is a diagram schematically showing the principle of this invention, FIGS. 2 and 3 are diagrams for explaining a first embodiment of this invention, and FIGS. 4 and 5 are diagrams for explaining the first embodiment of this invention. 6 and 7 are diagrams for explaining the operation of the binarization level generator, and FIG. 8 is a diagram for explaining the second embodiment of the invention. Figures 9 and 10 are for explaining the conventional 2
01...ROM which is a diagram for explaining the value conversion method. 2...Buffer memory section. 3...Line memory. 4.5.6...1 bit latch. 7...Encoder. 11...A/D converter. 12...Line memory. 13.14...Latch. 15... Adder. 16...Binarization level generator. 17...Comparator. 21...A/D converter. 22...Latch. 23... Comparator. 24...Volume.

Claims (2)

[Claims] (1) An image signal binarization processing method characterized in that when a pixel of interest is binarized, a binarization level is determined based on peripheral pixel data, and binarization is performed according to this binarization level. (2) The image signal binarization processing method according to claim 1, wherein the binarization level is determined based on the sum or average value of surrounding pixel data.