JPS62256516A - Filter device for base band transmission - Google Patents

Filter device for base band transmission

Info

Publication number
JPS62256516A
JPS62256516A JP9967186A JP9967186A JPS62256516A JP S62256516 A JPS62256516 A JP S62256516A JP 9967186 A JP9967186 A JP 9967186A JP 9967186 A JP9967186 A JP 9967186A JP S62256516 A JPS62256516 A JP S62256516A
Authority
JP
Japan
Prior art keywords
signal
filter
bit
rom
shift register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9967186A
Other languages
Japanese (ja)
Inventor
Shinichi Sato
真一 佐藤
Mitsuo Togashi
富樫 光夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic System Solutions Japan Co Ltd
Original Assignee
Matsushita Graphic Communication Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Graphic Communication Systems Inc filed Critical Matsushita Graphic Communication Systems Inc
Priority to JP9967186A priority Critical patent/JPS62256516A/en
Publication of JPS62256516A publication Critical patent/JPS62256516A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To realize a complicated amplitude characteristic while the change in a filter characteristic with respect to the temperature change is less and the phase characteristic is linear by using a digital filter having one bit input and plural-bit outputs and onstituting the digital filter by a shift register and a ROM. CONSTITUTION:When a 1-bit digital signal Din synchronously with a clock signal CK is inputted to a shift register 12, the register is shifted synchronously with the clock signal by using latches 111-116 shown in signals A1-A7. Then the operation of equation 1 is executed by the method of a table lookup memory in a ROM 13. An 8-bit digital signal D1-8 from the ROM 13 is converted into an analog signal by a D/A converter 14. The harmonics included in the signal are cut off by an LPF 15 and the result is outputted to a terminal 17 via an Amp 16. Thus, the phase is linear, the complicated amplitude charactristic is realized, the effect of temperature is not given and the circuit scale is decreased.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ディジタル信号多重放送等に用いられるベー
スバンド信号のスペクトル整形用フィルタ装置に関する
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a filter device for spectral shaping of baseband signals used in digital signal multiplex broadcasting and the like.

従来の技術 従来のこの種の装置は、第4図に示すようにディジタル
信号入力端子1と、D/A’変換器2と、アナログフィ
ルタ3と、ラインドライバーアンプ4と、信号出力端子
5により構成され、誤り訂正検出符号化された1ピツト
のディジタル信号がディジタル信号入力端子lから入力
すると、D/A変換器2で伝送路の信号電圧レベルの方
形波信号に変換し、その方形波信号をアナログフィルタ
3を通してスペクトル整形し、ラインドライバーアンプ
4を介して信号出力端子5よシ出力していた。
2. Description of the Related Art A conventional device of this type has a digital signal input terminal 1, a D/A' converter 2, an analog filter 3, a line driver amplifier 4, and a signal output terminal 5, as shown in FIG. When a 1-pit digital signal that has been configured and encoded with error correction detection is input from the digital signal input terminal l, it is converted into a square wave signal at the signal voltage level of the transmission line by the D/A converter 2, and the square wave signal is The signal is passed through an analog filter 3 to undergo spectrum shaping, and then outputted to a signal output terminal 5 via a line driver amplifier 4.

アナログフィルタ3は、抵抗、コンデンサ、コイルなど
の受動部品とオベア/プを組み合わせたアクティブ型フ
ィルタもしくは、受動部品のみを組み合わせたパッシブ
型フィルタが用いられ、符号量干渉を補償する目的では
コサインロールオフ型の振幅特性を持たせることが多か
った。(例えば、テレビジョン学会誌V01.39.N
[L9(1985)P822〜8251日本放送協会編
「放送方式J P214〜219)。
The analog filter 3 is an active type filter that combines passive components such as resistors, capacitors, and coils with obair/pumps, or a passive type filter that combines only passive components.For the purpose of compensating for code amount interference, a cosine roll-off filter is used. It was often given a type of amplitude characteristic. (For example, Television Society Journal V01.39.N
[L9 (1985) P822-8251 Edited by Japan Broadcasting Corporation "Broadcasting System J P214-219".

発明が解決しようとする問題点 しかし、従来の構成によれば、アナログフィルタに用い
られる受動素子パラメータの温度変動によシフィルタ特
性が変化したり、複雑な振幅特性のフィルタを実現する
ことが困難であシ、また位相特性が線形のフィルタを実
現することが困難であるという問題点がある。
Problems to be Solved by the Invention However, with the conventional configuration, the filter characteristics change due to temperature fluctuations in the passive element parameters used in the analog filter, and it is difficult to realize a filter with complex amplitude characteristics. Another problem is that it is difficult to realize a filter with linear phase characteristics.

上述の問題は、アナログフィルタの欠点と同様に、フィ
ルタをアナログ素子で構成するために発生する。この問
題点は、アナログ素子のフィルタ装置を恒温槽の中に配
置し、かつ振幅特性、位相特性については適応望の等化
器を用いることによシ解決することができるが、この場
合には装置が大規模になり、また調整が極めて複雑にな
るという新たな問題が発生する。
The above-mentioned problems, as well as the disadvantages of analog filters, arise because the filters are composed of analog elements. This problem can be solved by placing the analog element filter device in a thermostatic chamber and using an equalizer with appropriate amplitude and phase characteristics. New problems arise in that the equipment becomes large and the adjustment becomes extremely complex.

次にフィルタ部を通常のnピット入力、nビット出力デ
ィジタルフィルタで構成した場合、温度変化による特性
変化の問題と、位相特性を線形にする問題は解決するこ
とができるが、複雑な振幅特性を実現するためには多く
のタップ数が必要であシ、回路規模が大きくなり、又積
和回路を中心とする複雑な信号処理が必要になるといっ
た新たな問題が発生する。
Next, if the filter section is configured with a normal n-pit input, n-bit output digital filter, it is possible to solve the problem of characteristic changes due to temperature changes and the problem of making the phase characteristic linear, but it is possible to solve the problem of making the phase characteristic linear. In order to realize this, a large number of taps is required, the circuit scale becomes large, and new problems arise, such as the need for complex signal processing centered on a product-sum circuit.

本発明は、上述の問題点に鑑み、温度変化に対するフィ
ルタ特性の変化が無く、位相特性が線形であシ、複雑な
振幅特性を実現することができ、かつ回路規模が小さい
ベースバンド伝送用フィルタ装置を提供することを目的
とする。
In view of the above-mentioned problems, the present invention provides a baseband transmission filter that does not change filter characteristics due to temperature changes, has linear phase characteristics, can realize complex amplitude characteristics, and has a small circuit scale. The purpose is to provide equipment.

問題点を解決するための手段 本発明は上記問題点を解決するため、ベースバンド伝送
用ではディジタル入力が1ビットであることに着目し、
1ビットの入力信号を順次ンフトして所定のタップ数の
信号を出力するシフトレジスタと、シフトレジスタの出
力信号をそれぞれ所定のタップ係数によシ演算して所定
のビット数の信号を算出するリードオンリメモリを備え
たディジタルフィルタの構成としたことを特徴とする。
Means for Solving the Problems In order to solve the above problems, the present invention focuses on the fact that the digital input for baseband transmission is 1 bit.
A shift register that sequentially shifts a 1-bit input signal and outputs a signal with a predetermined number of taps, and a lead that calculates a signal with a predetermined number of bits by operating the output signal of the shift register by a predetermined tap coefficient, respectively. It is characterized by a configuration of a digital filter with only memory.

作用 本発明は上述の構成によって、ディジタルフィルタの入
力が1ビットであるために、遅延回路部であるシフトレ
ジスタによシ各タップデータのビット数が1ビットとな
シ、全タップデータを同時にリードオンリメモリ(RO
M)のアドレスへ入力することが可能となシ(例えば5
12K  b i t(64KX8bit )のROM
を用いれば16タツプのデータを同時に入力することが
できる。)、シたがってディジタルフィルタの構成に必
要な各タップデータとタップ係数の乗算を行う乗算器と
、その結果の総和を求める加算器の機能をテーブルルッ
クアップの手法でROMによシ行わせることができる。
Effect of the Invention With the above-described configuration, the input of the digital filter is 1 bit, so the number of bits of each tap data is 1 bit in the shift register, which is a delay circuit, and all tap data can be read simultaneously. Only Memory (RO
If it is possible to input to the address of M) (for example, 5
12K bit (64KX8bit) ROM
If you use , you can input 16 taps of data at the same time. ), therefore, the functions of a multiplier that multiplies each tap data and tap coefficient necessary for configuring a digital filter, and an adder that calculates the sum of the results are performed in the ROM using a table lookup method. Can be done.

また、本発明によれば位相が線形であシ、複雑な振幅特
性が実現でき、温度変化にの影響を受けず、かつ回路規
模を小さくすることができる。
Further, according to the present invention, the phase is linear, complex amplitude characteristics can be realized, the circuit is not affected by temperature changes, and the circuit size can be reduced.

実施例 以下、図面を参照して本発明の詳細な説明する。第1図
は本発明に係るベースバンド伝送用フィルタ装置の一実
施例を示すブロック図であり、タップ数tが7個の場合
を示す。
EXAMPLES Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a baseband transmission filter device according to the present invention, and shows a case where the number of taps t is seven.

第1図において、9はクロック信号CKの入力端子、1
0は1ビットのディジタル信号Dinの入力端子、11
11112・・・・・・・・・116はクロック信号C
K及び1ビットのディジタル信号Dinが入力する6(
t−1)個のラッチ、12はラッチ111〜116によ
シ構成されて信号Dinを順次シフトする遅延回路を構
成するシフトレジスタ、13はアドレス信号A1〜A7
として入力したディジタル信号Din及びラッチllr
〜116の出力(タップデータ)にそれぞれタップ係数
C1−C7を乗算し、その総和を算出して8ビットのデ
ィジタル信号を出力するリードオンリメモリ(ROM 
)である。尚、タップ係数C1〜C7は所望のフィルタ
特性に応じて予め選択される。
In FIG. 1, 9 is an input terminal for the clock signal CK;
0 is the input terminal for the 1-bit digital signal Din, 11
11112...116 is the clock signal C
K and 1-bit digital signal Din are input to 6(
t-1) latches, 12 is a shift register composed of latches 111 to 116 and constitutes a delay circuit that sequentially shifts the signal Din, and 13 is a shift register for address signals A1 to A7.
Digital signal Din and latch llr input as
A read-only memory (ROM) that multiplies the 116 outputs (tap data) by tap coefficients C1 to C7, calculates the sum, and outputs an 8-bit digital signal.
). Note that the tap coefficients C1 to C7 are selected in advance according to desired filter characteristics.

また、14はROM13からの8ビットのディジタル信
号をアナログ信号に変換するD/A変換器、15はD/
A変換器14の出力信号に含まれる高調波成分をカット
するローパスフィルタ(LPF) 、16は出力インピ
ーダンスを低くするためのラインドライバーアンプ(A
mp )、17はデータ信号入力端子である。
Further, 14 is a D/A converter that converts an 8-bit digital signal from the ROM 13 into an analog signal, and 15 is a D/A converter.
A low pass filter (LPF) cuts harmonic components included in the output signal of the A converter 14, and a line driver amplifier (A
mp), 17 is a data signal input terminal.

次に上記構成に係る実施例に動作を第2図及び第3図を
参照して説明する。
Next, the operation of the embodiment according to the above configuration will be explained with reference to FIGS. 2 and 3.

第2図に示すように、クロック信号CKに同期した1ビ
ットのディジタル信号Dinがシフトレジスター2に入
力すると、信号A1〜A7に示すようにラッチ11、〜
116によりクロック信号に同期してシフトされる。次
に、ROM13ではテーブルルックアップメモリの手法
によp式 %式% の演算が実行される。
As shown in FIG. 2, when a 1-bit digital signal Din synchronized with the clock signal CK is input to the shift register 2, the latches 11, -
116, it is shifted in synchronization with the clock signal. Next, in the ROM 13, the calculation of p expression % expression % is executed using a table lookup memory method.

ROM13からの8ビットのディジタル信号り、〜8は
D/A変換器14によシ、第2図に示すようなアナログ
信号D/Aontに変換される。ここで、この信号D 
/ A outには第3図下段に示すように、信号aの
ほかにディジタルフィルタのクロック周波数fcの整数
倍に相当する周波数の両サイドに広がる高調波成分すが
存在する。したがって、この高調波成分すが第3図上段
に示す振幅特性Cを有するLPF15によりカットされ
て第2図に示すような信号D ATA outに整形さ
れ、Amp16を介して端子17に出力される。
The 8-bit digital signal 8 from the ROM 13 is converted by the D/A converter 14 into an analog signal D/Aont as shown in FIG. Here, this signal D
As shown in the lower part of FIG. 3, at /A out, in addition to the signal a, there are harmonic components spread on both sides of a frequency corresponding to an integral multiple of the clock frequency fc of the digital filter. Therefore, this harmonic component is cut by the LPF 15 having the amplitude characteristic C shown in the upper part of FIG. 3, shaped into a signal DATA out as shown in FIG.

以下、本発明の一実施例雀説明したが、本発明は上記実
施例に限定されるものでなく、例えばフィルタのタップ
数は所望のフィルタ特性によって増減することができ、
またROM13の入出力ビット数及びD/A変換器14
の入力ビット数は、出力信号の精度によシ任意選択する
ことができる。
An embodiment of the present invention has been described below, but the present invention is not limited to the above embodiment. For example, the number of taps of the filter can be increased or decreased depending on desired filter characteristics.
Also, the number of input/output bits of the ROM 13 and the D/A converter 14
The number of input bits can be arbitrarily selected depending on the accuracy of the output signal.

発明の効果 以上の説明から明らかなように、本発明は1ビット入力
、複数ビット出力のディジタルフィルタとし、そのディ
ジタルフィルタをシフトレジスタとROMで構成するこ
とにより、温度変化によシ、フィルタ特性の変化が無く
、位相特性が線形であり、また複雑な振幅特性を実現す
ることができ、さらに回路規模が小さくすることができ
るという効果を有するものである。
Effects of the Invention As is clear from the above explanation, the present invention is a digital filter with 1-bit input and multiple-bit output, and by configuring the digital filter with a shift register and ROM, the filter characteristics can be changed easily due to temperature changes. This has the advantage that there is no change, the phase characteristic is linear, complex amplitude characteristics can be realized, and the circuit scale can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すベースバンド伝送用フ
ィルタ装置のブロック図、第2図は第1図の要部信号波
形図、第3図は第1図の要部周波数特性図、第4図は従
来例のブロック図である。 111〜116・・・ラッチ、12・・・シフトレジス
タ、13・・・リードオンリメモリ、14・・・D/A
変換器。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名軽
FIG. 1 is a block diagram of a baseband transmission filter device showing an embodiment of the present invention, FIG. 2 is a signal waveform diagram of the main part of FIG. 1, and FIG. 3 is a frequency characteristic diagram of the main part of FIG. 1. FIG. 4 is a block diagram of a conventional example. 111 to 116... Latch, 12... Shift register, 13... Read only memory, 14... D/A
converter. Name of agent: Patent attorney Toshio Nakao and one other person

Claims (1)

【特許請求の範囲】[Claims] 1ビットのディジタル信号を順次シフトして所定のタッ
プ数の信号を出力するシフトレジスタと、前記シフトレ
ジスタからの出力信号をそれぞれ所定のタップ係数によ
り演算して所定のビット数のディジタル信号を算出する
リードオンリメモリと、前記リードオンリメモリからの
ディジタル信号をアナログ信号に変換するD/A変換器
とを有するベースバンド伝送用フィルタ装置。
A shift register that sequentially shifts a 1-bit digital signal to output a signal with a predetermined number of taps, and a digital signal with a predetermined number of bits is calculated by calculating the output signal from the shift register using a predetermined tap coefficient, respectively. A baseband transmission filter device comprising a read-only memory and a D/A converter that converts a digital signal from the read-only memory into an analog signal.
JP9967186A 1986-04-30 1986-04-30 Filter device for base band transmission Pending JPS62256516A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9967186A JPS62256516A (en) 1986-04-30 1986-04-30 Filter device for base band transmission

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9967186A JPS62256516A (en) 1986-04-30 1986-04-30 Filter device for base band transmission

Publications (1)

Publication Number Publication Date
JPS62256516A true JPS62256516A (en) 1987-11-09

Family

ID=14253495

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9967186A Pending JPS62256516A (en) 1986-04-30 1986-04-30 Filter device for base band transmission

Country Status (1)

Country Link
JP (1) JPS62256516A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6487190B1 (en) 1996-06-27 2002-11-26 Interdigital Technology Corporation Efficient multichannel filtering for CDMA modems
US7706332B2 (en) 1995-06-30 2010-04-27 Interdigital Technology Corporation Method and subscriber unit for performing power control
US7903613B2 (en) 1995-06-30 2011-03-08 Interdigital Technology Corporation Code division multiple access (CDMA) communication system
US7929498B2 (en) 1995-06-30 2011-04-19 Interdigital Technology Corporation Adaptive forward power control and adaptive reverse power control for spread-spectrum communications
US8737363B2 (en) 1995-06-30 2014-05-27 Interdigital Technology Corporation Code division multiple access (CDMA) communication system

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7706332B2 (en) 1995-06-30 2010-04-27 Interdigital Technology Corporation Method and subscriber unit for performing power control
US7903613B2 (en) 1995-06-30 2011-03-08 Interdigital Technology Corporation Code division multiple access (CDMA) communication system
US7929498B2 (en) 1995-06-30 2011-04-19 Interdigital Technology Corporation Adaptive forward power control and adaptive reverse power control for spread-spectrum communications
US8737363B2 (en) 1995-06-30 2014-05-27 Interdigital Technology Corporation Code division multiple access (CDMA) communication system
US9564963B2 (en) 1995-06-30 2017-02-07 Interdigital Technology Corporation Automatic power control system for a code division multiple access (CDMA) communications system
US6487190B1 (en) 1996-06-27 2002-11-26 Interdigital Technology Corporation Efficient multichannel filtering for CDMA modems
US6907024B2 (en) 1996-06-27 2005-06-14 Interdigital Technology Corporation Efficient multichannel filtering for CDMA modems
US7631027B2 (en) 1996-06-27 2009-12-08 Interdigital Technology Corporation Efficient multichannel filtering for CDMA modems

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