JPS6225530A - Fault detector of loop data link system - Google Patents

Abstract

PURPOSE:To detect surely an error location by sending a CPU output to a transmitter means when an error detection circuit detects an error at demodulation in a transmission line from a receive means to a transmitter means. CONSTITUTION:An output of the receive means 2 is sent to the transmitter means 3 via the error detection circuit 5, a selector 6 and a modulation circuit 8 at demodulation. When the circuit 5 detects an error, a CPU 7 inputting the detected output changes over the selector 6 to send a data (e.g., an idle data) from the CPU 7 to the transmitter means 3. When the state is not released for a prescribed time or over, the circuit 5 or the CPU 7 displays generation of the error. Thus, the error generation location is detected surely. Further, the data transmission time is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The invention relates to a failure detection device for a loop data link system, and more particularly, to a fault detection device for a loop data link system, in which n link units each having a receiving means, a transmitting means, and a central processing unit are The present invention relates to a failure detection device for a loop data link system in which the receiving means and transmitter means of the units are sequentially connected, one of the link units is a master station, and the other is a slave station.

[Conventional technology]

FIG. 2 is a schematic diagram showing a conventional link unit. In the figure, 1 is a main body case, and within this main body case 1, a receiving means 2, a transmitting means 3, and a buffer 4 are provided.

Figure 3 shows n link units having the above configuration, receiving means 2 and transmitting means 3 of adjacent link units.
This is a data link system in which comrades are connected in sequence, with one link unit 1o serving as a master station and the other link units 11 to 1n serving as slave stations.

Conventionally, each slave station link unit 11 to 1n always transmits the output of the receiving means 2 to the transmitter means 3 via the buffer 4. Therefore, for example, if a cable breakage failure occurs between the slave station link unit 11 and the slave station link unit 11, the failure can be detected in the slave station link unit 11.

[Problem that the invention seeks to solve]

Since the conventional loop data link system is configured as described above, data is always transmitted via a buffer within each slave station link unit, and the data is always transmitted via the buffer in each slave station link unit.
The data transmitted from o is sent to each slave station link unit 11 to
There is a problem in that the time required for data to return to the master station link unit through 1n, that is, the time required for data to go around the loop once, becomes longer.

This invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a failure detection device for a loop data link system that can shorten data transmission time and detect error locations. .

[Means for solving problems]

The loop data link system according to the present invention includes, in each slave station link unit, a demodulation and demodulation error detection circuit that receives the output of the receiving means, and a demodulation and demodulation error detection circuit that receives the output of the central processing unit. It is provided with a selector for making a selection, and a modulation circuit which receives the output of the selector as an input and supplies the output to the transmitter means.

[For production]

In the present invention, each slave station link unit transmits the output of the receiving means to the transmitter means during normal operation, and when the demodulation and demodulation error detection circuit in the transmission path detects an error, the output of the receiving means is transmitted to the transmitter means. The output of the CPU is selected as a substitute, and if this selection state continues for a certain period of time, it is determined that an error has occurred.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows an outline of a link unit in which the same parts as in FIG. 2 are denoted by the same reference numerals. In FIG. is demodulation and demodulation error detection circuit 5
and a central processing unit (hereinafter referred to as CPU) 7, and 8 is a modulation circuit which receives the output of the selector 6 as an input and supplies the output to the transming means 3.

When a loop data link system is constructed by sequentially connecting n link units having the above configuration as shown in FIG. The signal is transmitted to the transmitter means 3 via the selector 6 and the modulation circuit 8. Therefore,
Data transmission time within the link unit is short.

On the other hand, when the demodulation and demodulation error detection circuit 5 detects an error, the CPU 7 that inputs the detection output switches the selector 6 and transfers the data (for example, idle) output from the CPU 7 to the selector 6 and the modulation circuit 8. to the transmitter means 3 via. If this state is not cleared even after a certain period of time has elapsed, the demodulation and demodulation error detection circuit 5 or the CPU 7 determines that an error has occurred, and displays the error occurrence (indicator lamp or buzzer, etc., not shown). let

Although a single loop data link system has been described in the above embodiment, it is also possible to connect n link units each having two combinations of receive means and transmitter means in order to sequentially connect the receive means and transmitter means of adjacent link units. Even a double-loop data link system configured as shown in FIG.

〔Effect of the invention〕

As described above, according to the present invention, the slave station link unit is configured to transmit data to an adjacent station using a repeater without going through a buffer, so the time it takes for data to go around the loop data link system is shortened. This has the effect of making it possible to detect errors more reliably.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of a link unit having a failure detection device according to an embodiment of the present invention, FIG. 2 is a schematic diagram of a conventionally used link unit, and FIG. 3 is a configuration diagram of a loop data link system. . 10 to 1n are link units, 2 is a receiving means, 3 is a transmitter means, 5 is a demodulation and demodulation error detection circuit, 6 is a selector, and 7 is a CPU. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] n link units each having a receiving means, a transmitting means, and a central processing unit are sequentially connected to each other, with the receiving means and transmitting means of adjacent link units being connected in sequence, with one of the link units serving as a master station and the others as slave stations. In the loop data link system, each of the slave station link units includes a demodulation and demodulation error detection circuit that receives the output of the receiving means, and selects the output of the demodulation and demodulation error detection circuit and the central processing unit. and a modulation circuit which takes the output of this selector as input and supplies the output to the transmitter means, and when normal, the output of the receive means is transmitted to the transmitter means, and the demodulation and demodulation error detection circuit When an error is detected, the CPU switches the selector based on the detected output and transmits the output of the CPU to the transmitter means, and if this state continues for a certain period of time, it is determined that there is an error. A failure detection device for a loop data link system.