JPS62253228A - Parity or syndrome generating circuit - Google Patents

Parity or syndrome generating circuit

Info

Publication number
JPS62253228A
JPS62253228A JP9650486A JP9650486A JPS62253228A JP S62253228 A JPS62253228 A JP S62253228A JP 9650486 A JP9650486 A JP 9650486A JP 9650486 A JP9650486 A JP 9650486A JP S62253228 A JPS62253228 A JP S62253228A
Authority
JP
Japan
Prior art keywords
data
syndrome
register
word
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9650486A
Other languages
Japanese (ja)
Inventor
Yuichi Kadokawa
Osamu Adachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP9650486A priority Critical patent/JPS62253228A/en
Publication of JPS62253228A publication Critical patent/JPS62253228A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To generate a parity or a syndrome by supplying a data and the order of the data in a correction series as address data in a device using an error correction code of a digital coding data.
CONSTITUTION: A data word location in a sector of the 1st data word in a correction series and its data are fed to a ROM 10 from a signal received from a storage device. The syndrome corresponding to the data is outputted from the corresponding area of the ROM 10 depending whether the P or Q syndrome is generated, and the syndrome is stored in a syndrome register 12 or 13 from an adder 11. In applying the location of the next data word in a correction series and the data to the ROM 10, the adder 11 adds the data to the syndrome generated from the 1st data word from the register 12 or 13 by the adder 11. Then the result is stored again in the register 12 or 13. The operation above is repeated up to the final word of the correction series and the syndrome is outputted from the register 12 or 13.
COPYRIGHT: (C)1987,JPO&Japio
JP9650486A 1986-04-25 1986-04-25 Parity or syndrome generating circuit Pending JPS62253228A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9650486A JPS62253228A (en) 1986-04-25 1986-04-25 Parity or syndrome generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9650486A JPS62253228A (en) 1986-04-25 1986-04-25 Parity or syndrome generating circuit

Publications (1)

Publication Number Publication Date
JPS62253228A true JPS62253228A (en) 1987-11-05

Family

ID=14166942

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9650486A Pending JPS62253228A (en) 1986-04-25 1986-04-25 Parity or syndrome generating circuit

Country Status (1)

Country Link
JP (1) JPS62253228A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008525898A (en) * 2004-12-23 2008-07-17 インテル・コーポレーション Method and system for syndrome generation and data recovery

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008525898A (en) * 2004-12-23 2008-07-17 インテル・コーポレーション Method and system for syndrome generation and data recovery
JP4664988B2 (en) * 2004-12-23 2011-04-06 インテル・コーポレーション Method and system for syndrome generation and data recovery

Similar Documents

Publication Publication Date Title
JPS6162234A (en) Error correction code decoding system
JPS6151253A (en) Memory error correctng circuit
JPS62177768A (en) Error correcting device
JPS59135605A (en) Error corrector for binary data
JPS6187277A (en) Method and device for pcm signal reproduction
JPS5846741A (en) Decoder
JPS62253228A (en) Parity or syndrome generating circuit
JPH01311623A (en) Acceleration arithmetic circuit
JPS6260320A (en) Error correction circuit
JPH0385923A (en) Crc arithmetic system
JPS55102034A (en) Set unit for unit address
JPS62266927A (en) Digital data operation processing unit
JPS6325737A (en) Generating circuit for error correction code
JPS62266926A (en) Digital data arithmetic processing unit
JPS61101857A (en) Memory error detecting correcting circuit
JPS6345922A (en) Error correction method
JPS54152832A (en) Loading system
JPS5515544A (en) Generating circuit for syndrome for error correction code generation
JPS6170819A (en) Method of decoding error correction and decoder
JPS5545110A (en) Error detection system
JPS63156428A (en) Encoding/decoding circuit for t-multiple error correcting code
JPS5294041A (en) Error correction system
JPS5843044A (en) Data error generating circuit
JPS62199122A (en) Binary information converting circuit
JPS6133022A (en) Code processor