JPS62226257A - 演算処理装置 - Google Patents

演算処理装置

Info

Publication number
JPS62226257A
JPS62226257A JP61069215A JP6921586A JPS62226257A JP S62226257 A JPS62226257 A JP S62226257A JP 61069215 A JP61069215 A JP 61069215A JP 6921586 A JP6921586 A JP 6921586A JP S62226257 A JPS62226257 A JP S62226257A
Authority
JP
Japan
Prior art keywords
interrupt
vector
data
memory access
arithmetic processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61069215A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0442699B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Jiro Hirahara
平原　治郎
Akito Abe
昭人 阿部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP61069215A priority Critical patent/JPS62226257A/ja
Priority to EP87104610A priority patent/EP0239128A3/en
Publication of JPS62226257A publication Critical patent/JPS62226257A/ja
Priority to US07/383,266 priority patent/US5063498A/en
Publication of JPH0442699B2 publication Critical patent/JPH0442699B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP61069215A 1986-03-27 1986-03-27 演算処理装置 Granted JPS62226257A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP61069215A JPS62226257A (ja) 1986-03-27 1986-03-27 演算処理装置
EP87104610A EP0239128A3 (en) 1986-03-27 1987-03-27 Data processing device with direct memory access function
US07/383,266 US5063498A (en) 1986-03-27 1989-07-20 Data processing device with direct memory access function processed as an micro-code vectored interrupt

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61069215A JPS62226257A (ja) 1986-03-27 1986-03-27 演算処理装置

Publications (2)

Publication Number Publication Date
JPS62226257A true JPS62226257A (ja) 1987-10-05
JPH0442699B2 JPH0442699B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-07-14

Family

ID=13396272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61069215A Granted JPS62226257A (ja) 1986-03-27 1986-03-27 演算処理装置

Country Status (3)

Country Link
US (1) US5063498A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0239128A3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS62226257A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02199542A (ja) * 1989-01-30 1990-08-07 Ricoh Co Ltd 情報処理装置

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01258163A (ja) * 1988-04-08 1989-10-16 Fujitsu Ltd ダイレクトメモリアクセス制御装置
JP2539058B2 (ja) * 1989-03-30 1996-10-02 三菱電機株式会社 デ―タプロセッサ
JPH03142504A (ja) * 1989-10-30 1991-06-18 Toshiba Corp プログラマブルコントローラ
GB2271204B (en) * 1992-10-01 1996-01-03 Digital Equipment Int Digital system memory access
DE19733527A1 (de) * 1997-08-02 1999-02-04 Philips Patentverwaltung Kommunikationssystem mit einer DMA-Einheit
DE19733526A1 (de) * 1997-08-02 1999-02-04 Philips Patentverwaltung Kommunikationssystem mit einer Schnittstelle
WO2000018052A1 (en) * 1998-09-24 2000-03-30 Omnipoint Corporation Management of time slot operations for wireless communication
US6260082B1 (en) * 1998-12-23 2001-07-10 Bops, Inc. Methods and apparatus for providing data transfer control
US6810443B2 (en) * 2002-12-31 2004-10-26 Intel Corporation Optical storage transfer performance
US7243178B2 (en) * 2003-05-16 2007-07-10 Intel Corporation Enable/disable claiming of a DMA request interrupt
US7895411B2 (en) * 2003-10-02 2011-02-22 Nvidia Corporation Physics processing unit
US7739479B2 (en) * 2003-10-02 2010-06-15 Nvidia Corporation Method for providing physics simulation data
US20050086040A1 (en) * 2003-10-02 2005-04-21 Curtis Davis System incorporating physics processing unit
US20050251644A1 (en) * 2004-05-06 2005-11-10 Monier Maher Physics processing unit instruction set architecture
US8386704B2 (en) * 2006-10-25 2013-02-26 HGST Netherlands B.V. Techniques for improving hard disk drive efficiency
JP7249968B2 (ja) * 2020-03-09 2023-03-31 株式会社東芝 情報処理装置およびストレージ

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5248440A (en) * 1975-10-15 1977-04-18 Toshiba Corp Memory access control system
US4090238A (en) * 1976-10-04 1978-05-16 Rca Corporation Priority vectored interrupt using direct memory access
US4133030A (en) * 1977-01-19 1979-01-02 Honeywell Information Systems Inc. Control system providing for the transfer of data in a communications processing system employing channel dedicated control blocks
US4532587A (en) * 1981-08-26 1985-07-30 Texas Instruments Incorporated Single chip processor connected to an external memory chip
JPS6019269A (ja) * 1983-07-13 1985-01-31 Nec Corp 高速デ−タ転送方式
JP2618223B2 (ja) * 1984-07-27 1997-06-11 株式会社日立製作所 シングルチツプマイクロコンピユータ
US4648029A (en) * 1984-08-27 1987-03-03 International Business Machines Corporation Multiplexed interrupt/DMA request arbitration apparatus and method
US4716523A (en) * 1985-06-14 1987-12-29 International Business Machines Corporation Multiple port integrated DMA and interrupt controller and arbitrator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02199542A (ja) * 1989-01-30 1990-08-07 Ricoh Co Ltd 情報処理装置

Also Published As

Publication number Publication date
US5063498A (en) 1991-11-05
JPH0442699B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-07-14
EP0239128A2 (en) 1987-09-30
EP0239128A3 (en) 1990-01-17

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees