JPS62221281A - Image display system - Google Patents

Abstract

PURPOSE:To insure the picture quality interference against arising if a display quickly changes by controlling the jump ratio of a jump scan with the aid of a signal specifying a speed that the displayed contents change. CONSTITUTION:According to an external input control signal instructing whether scrolling is executed or not a CPU 16 modifies a read top address in a VRAM 15 storing a display signal and scrolls an image displayed on a liquid crystal display 11. When a control circuit 14 receives the signal instructing the execution of scrolling, it supplies a control signal to a scan circuit 13 so as to execute the jump scan with a low ratio. When receiving the signal to deny scrolling, the control circuit 14 inputs the control signal to the scan circuit 13 so as to execute the jump scan with a great scan ratio. Thus a scan is modified when a displayed changes quickly so that the picture quality interference will not occur.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field to Which the Invention Pertains) The present invention relates to an image display method using interlaced scanning.

(Prior Art) In conventional image display systems such as CRT, interlaced scanning is used to reduce display data transfer speed.

FIG. 4 is a diagram for explaining conventional interlaced scanning, and shows a scanning method of 2:1 interlaced scanning in an NTSC television.

In even-numbered fields, even-numbered scanning lines are scanned, and in odd-numbered fields, odd-numbered scanning lines are scanned. As a result, the transfer rate of display data sent to a television set is reduced to 1/2 compared to the case where interlaced scanning is not used, without interfering with the image quality for the human eye.

In this example, every other scan line is scanned.

Every second line and every third line scanning (each with an interlace ratio of 3:1)
．． 4:1 interlaced scanning) is also possible.

By performing interlace scanning with an interlace ratio of N:1 in this manner, the frame frequency can be reduced to 1/H under the condition that the field frequency is constant.

However, if you attempt to reduce the frame frequency by performing interlaced scanning with a large interlacing ratio, the scanning lines are thinned out, which causes image quality interference called line crawling, where flickers and horizontal lines appear to move up and down, making it unusable.
Daiji Nishizawa: Visual Effects of Interlacing, Television Society Visual Research Committee Material No. 25-3, September 20, 1971.
Day).

The above interlaced scan is a memory type display that can hold the display '&! When applied to [, one display is maintained, so image quality disturbances such as flicker and line crawling are less likely to occur, and the effect is even greater.

FIG. 5 shows a configuration diagram of an active matrix liquid crystal display (LCD) which is a typical example of a memory type display device.

1 is a thin film transistor (TPT), 2 is a display signal storage capacitor, and 3 is a liquid crystal display element.

The source of the TFTI is connected to the signal line 4, and the gate is connected to the scanning line 5.

These are arranged in a matrix to form a display panel.

When a voltage is applied to the scanning line, the TFTI connected to the scanning line becomes conductive, and the display signal voltage is stored in the display signal storage capacitor 2 via the signal line.

Therefore, until the display signal voltage is lost due to leakage current of the TFTI, a voltage corresponding to the display signal is applied to the liquid crystal to display "bright" and "dark".

The time that this display is maintained is about 100 times longer than the afterglow time of the phosphor used in ordinary CRTs (loo +
m). Therefore, in an active matrix type LCD, compared to a CRT, image quality disturbance is less likely to occur even if scanning is performed using interlaced scanning with a larger interlace ratio and the frame frequency is reduced.

In other words, in a memory type display device such as an active matrix type LCD, the interlace ratio can be increased to a large extent.
Frame frequency can be significantly reduced.

However, in the case of image display that involves scrolling, etc., in which the content of one display changes rapidly, if interlaced scanning with a large interlace ratio is performed and the frame frequency is significantly reduced, the display of the previous field will be retained, resulting in the display being overflowing. The afterimage phenomenon that appears when the image is subtracted is noticeably cursed. For this reason, it has the disadvantage that interlaced scanning with a large interlacing ratio cannot be performed (Kei Takigawa: Comparison of image quality between dot-line interlacing and field repeat, Proceedings of the National Conference of the Television Society of Japan, 1978).

(Objective of the Invention) An object of the present invention is to provide a novel interlaced scanning driving method that does not cause image quality disturbance such as afterimage in a memory-type image display device that can hold one display.

(Structure of the Invention) (Characteristics of the Invention and Differences from the Prior Art) The present invention provides an interlaced scanning drive method with a large interlacing ratio (for example, 8:1 or 4
:1) and a small interlaced scanning drive system (e.g.
The main feature is that it can be used by switching between an interlace ratio of 2:1, 1:1, etc.).

This differs from conventional driving methods that can only use interlaced scanning with a fixed frame frequency and fixed interlacing ratio in that the frame frequency and interlacing ratio are switched in response to a signal that instructs a change in display content.

(Embodiment) FIG. 1 is a diagram showing the configuration of an embodiment of the present invention, in which the configuration of the control circuit can realize a circuit that receives a control signal instructing a change in display content and a plurality of interlaced scanning methods. It differs from the conventional configuration in that it includes a circuit.

Reference numeral 11 denotes a liquid crystal display (LcD), whose basic structure and configuration are the same as the conventional one shown in FIG.

12 is a signal line drive circuit that supplies display signals to CLDII, and its output is connected to the signal line of the LCD.

13 is a scanning circuit, the output of which is connected to the scanning line of the LCD.

In the scanning circuit 13, a device 14 consisting of a shift register and a gate circuit as shown in FIG. supply.

15 is a VRAM (video memory) that stores a display signal for one image. Display signals are periodically read out from the VRAM 15 and supplied to the signal line drive circuit 12.

16 is a CPU that controls the entire image display device.

Next, the operation of the above circuit will be explained.

Normally, an image display device periodically reads and displays display signals in the VRAM 15. When performing interlaced scanning, the address sent to VRAM is compatible with interlaced scanning, and the CPU 16
It is calculated by

Image scrolling is controlled by the CPU 1 using an external input control signal that instructs whether or not to scroll.
VRAM 15 that stores display signals under the control of
This is done by changing the read start address.

When the image is scrolled in this manner, the change in display content within a unit time changes depending on the number of times within a unit time that a control signal, which is an external input, instructs whether or not to perform scrolling.

Therefore, in this embodiment, an external input signal instructing whether or not to perform scrolling is used.

It is used as a control signal to instruct changes in display content.

In addition, it is also possible to directly count the number of times the data is written to the VR-AM 15 and use it as a control signal to instruct the number of changes in display content within a unit time.

A control signal instructing the number of changes in display content within this unit time is transmitted to the control circuit 14, thereby switching the interlaced scanning driving method. The method is shown below.

When receiving a signal instructing scrolling, the control circuit sends an input signal I, Shift clock C and gate signal G are supplied.

When receiving a signal instructing not to scroll, the control circuit performs interlaced scanning (with a large interlacing ratio).
For example, the input signal I, shift clock C, and gate signal G are supplied to the scanning circuit so as to perform an interlace ratio n:1, where n is 8 or 4 (6, where n>m).

FIG. 3 is a timing diagram for explaining the present invention,
A timing diagram of the 1, C, and G signals supplied to the scanning circuit is shown.

In a conventional scanning method that does not perform interlaced scanning, a signal input to a shift register by an input signal I is sequentially shifted by a shift clock C.

At this time, if the gate signal G is at a high level as shown in FIG. 301, the output of the shift register is directly supplied to the scanning line of the LCD II, so that the scanning line is sequentially scanned from the top to the bottom.

Furthermore, if G is set to a high voltage every other shift clock C as in the timing shown in FIG. 302, every other scanning line is scanned, and 2:1 interlaced scanning can be realized.

Similarly, if G is set to a high voltage every two clocks of shift clock C as shown in FIG. 3, 3:1 interlaced scanning can be realized.

That is, if a circuit configuration such as that of this embodiment is adopted, interlace scanning with an arbitrary interlace ratio is possible simply by controlling the gate signal G.

In this way, arbitrary interlaced scanning is possible because the content of the display changes depending on the presence or absence of the display signal.

Can be easily changed.

The interlacing ratio to be scanned depending on the presence or absence of a signal instructing a change in display content is determined based on the display characteristics of each display device. It may be set in advance to perform interlaced scanning with an interlaced ratio of 2:1 when receiving data, and to perform interlaced scanning with an interlaced ratio of 8:1 when not received.

Here, we have explained the case where the state of interlaced scanning is divided into two stages: when a signal instructing a change in the content of one display is received and when it is not received, but there are multiple stages depending on the number of changes in the display content within a unit time. It is also possible to divide it into

In such a case, a plurality of interlace ratios for interlace scanning may be provided, and the interlace ratios may be switched according to the number of changes in display content within a unit time.

Therefore, according to the present invention, when scrolling or the like involving rapid changes in one display is performed, the scanning method is automatically changed so that image quality is not disturbed.

It is possible to display images with significantly better image quality than with conventional technology.

Furthermore, since the driving frequency can be significantly lowered compared to conventional driving methods, the power consumption of the driving circuit can also be significantly reduced.

(Effects of the Invention) As explained above, according to the present invention, since the interlace ratio is controlled by a signal instructing the speed of change in display content, the optimum interlace ratio can be achieved according to the change in display content. interlaced scanning is possible. Therefore, on an image display device that often displays still images, it is possible to perform interlaced scanning with a large average interlacing without causing deterioration in the quality of one image, and the frame frequency can be reduced compared to conventional methods, and the display data transfer rate can be increased. This can be significantly reduced.

Therefore, there is an advantage that the power consumption of a single image display device and the cost of peripheral circuits can be significantly reduced. In particular, large-area, high-definition image display devices have a large display capacity, so with conventional technology, the required display data transfer rate is several hundred Mb/s or more, which is a major factor in increasing the price of the device. ing.

In comparison, in the present invention, the display data transfer rate can be reduced to -the interlace ratio. Therefore, the present invention is applicable to large-area, high-definition image display devices.

The effect is great.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a circuit diagram of a scanning circuit for explaining the present invention, FIG. 3 is a timing diagram for explaining the present invention, and FIG. 4 is a diagram showing the configuration of an embodiment of the present invention. 5 is a diagram for explaining conventional interlaced scanning, and FIG. 5 is a diagram for explaining the configuration of an active matrix type LCD. ■...TFT, 2...Capacitor for display signal storage. 3...Liquid crystal display element, 4...Signal line, 5...Scanning line. DESCRIPTION OF SYMBOLS 11... Liquid crystal display, 12... Signal line drive circuit, 13... Scanning circuit, 14... Control circuit, 15...
...VRAM. 16...CPU. Patent applicant Nippon Telegraph and Telephone Corporation Figure 1 Figure 2 ■ Figure 3 Figure 4 Figure 5 Figure 1... TPT 29. Support 4sη5λ end old dump 31. *Nishizashi Fukuri 3 4...Kakomai 5...Lt 戊

Claims (1)

[Claims] In an image display method that performs interlaced scanning, if the number of changes in display content K (K is an integer greater than or equal to 0) within a unit time is smaller than the predetermined number of changes in display content K0 (K0 is an integer greater than 0), , the interlaced ratio of the interlaced scanning is n:1 (n is an integer of 1 or more), and when the K is greater than the predetermined number of changes in display content K0, the interlaced ratio of the interlaced scanning is m:1 (m is an integer of 1 or more). An integer of 2 or more, m
An image display method characterized in that the interlace ratio of the interlaced scanning is switched according to the K so that K becomes smaller than n.