JPS62204368U - - Google Patents

Info

Publication number
JPS62204368U
JPS62204368U JP9307386U JP9307386U JPS62204368U JP S62204368 U JPS62204368 U JP S62204368U JP 9307386 U JP9307386 U JP 9307386U JP 9307386 U JP9307386 U JP 9307386U JP S62204368 U JPS62204368 U JP S62204368U
Authority
JP
Japan
Prior art keywords
wiring board
multilayer wiring
map
conductive foil
connection map
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9307386U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9307386U priority Critical patent/JPS62204368U/ja
Publication of JPS62204368U publication Critical patent/JPS62204368U/ja
Pending legal-status Critical Current

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  • Structure Of Printed Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例における多層配線板の
銅箔側平面図、第2図及び第3図は、各々従来の
多層配線板の銅箔側平面図及び部品側側面図であ
る。 1……基材、2……導体箔、3……ダブルレジ
スト、4……スルーホール、5……ランド、6…
…接続マツプ。
FIG. 1 is a copper foil side plan view of a multilayer wiring board according to an embodiment of the present invention, and FIGS. 2 and 3 are a copper foil side plan view and a component side side view of a conventional multilayer wiring board, respectively. 1...Base material, 2...Conductor foil, 3...Double resist, 4...Through hole, 5...Land, 6...
...connection map.

Claims (1)

【実用新案登録請求の範囲】 (1) 複数面にそれぞれ所定のパターンの導体箔
を有する多層配線板の少なくとも一方の片面に、
その面の導体箔とスルーホールを介して電気的に
接続された他の面の導体箔のパターンを表示した
接続マツプを有する多層配線板。 (2) 接続マツプは、その片面に塗布されるソル
ダーレジストとは別の色のソルダーレジストによ
り形成されている事を特徴とする実用新案登録請
求の範囲第1項記載の多層配線板。 (3) 接続マツプは、その片面に形成されたサー
ビスマツプとは別の色のサービスマツプ用インク
により形成されている事を特徴とする実用新案登
録請求の範囲第1項記載の多層配線板。
[Claims for Utility Model Registration] (1) On at least one side of a multilayer wiring board having conductive foil with a predetermined pattern on each of multiple sides,
A multilayer wiring board having a connection map displaying a pattern of conductive foil on one side and conductive foil on another side that are electrically connected via through holes. (2) The multilayer wiring board according to claim 1, wherein the connection map is formed of a solder resist of a different color from the solder resist coated on one side of the connection map. (3) The multilayer wiring board according to claim 1, wherein the connection map is formed with a service map ink of a different color from that of the service map formed on one side of the multilayer wiring board.
JP9307386U 1986-06-18 1986-06-18 Pending JPS62204368U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9307386U JPS62204368U (en) 1986-06-18 1986-06-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9307386U JPS62204368U (en) 1986-06-18 1986-06-18

Publications (1)

Publication Number Publication Date
JPS62204368U true JPS62204368U (en) 1987-12-26

Family

ID=30955341

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9307386U Pending JPS62204368U (en) 1986-06-18 1986-06-18

Country Status (1)

Country Link
JP (1) JPS62204368U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50160772A (en) * 1974-06-17 1975-12-26

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50160772A (en) * 1974-06-17 1975-12-26

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