JPS62200751A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPS62200751A
JPS62200751A JP4307386A JP4307386A JPS62200751A JP S62200751 A JPS62200751 A JP S62200751A JP 4307386 A JP4307386 A JP 4307386A JP 4307386 A JP4307386 A JP 4307386A JP S62200751 A JPS62200751 A JP S62200751A
Authority
JP
Japan
Prior art keywords
lead frame
semiconductor element
groove processed
sealing material
processed parts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4307386A
Other languages
Japanese (ja)
Inventor
Takao Hashimoto
貴夫 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dai Nippon Printing Co Ltd
Original Assignee
Dai Nippon Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dai Nippon Printing Co Ltd filed Critical Dai Nippon Printing Co Ltd
Priority to JP4307386A priority Critical patent/JPS62200751A/en
Publication of JPS62200751A publication Critical patent/JPS62200751A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142Sealing arrangements between parts, e.g. adhesion promotors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]

Abstract

PURPOSE:To prevent a sealing material from peeling from a lead frame by providing a groove processed parts in the surface, whereon a semiconductor element is mounted, of the lead frame or the surface on the opposite side. CONSTITUTION:Groove processed parts 1 are provided in the surface, whereon a semiconductor element is mounted, of a lead frame or the surface on the opposite side so that such a sealing material as ceramic, plastic and glass materials is well adhered on the lead frame. As the groove processed parts 1, any groove processed parts can be arbitrarily selected so long as the planar form of each groove processed part is a form in such a state that linear forms, round forms, triangles, quadrangles or polygons are arranged in a lattice type or arranged in a zigzag form and also, the depth of the grooves is within the extent of never damaging the functions of the lead frame. The groove processed parts 1 are particularly effective when being performed on the back side 2 of the semiconductor element mounting part. Thereby, the peeling of the sealing material is prevented after a molding is performed and it can be completely prevented that the air, water content and so on intrude along the lead frame from the outside and the functions of the semiconductor element are reduced.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置用リードフレームに関する。[Detailed description of the invention] [Industrial application field] The present invention relates to lead frames for semiconductor devices.

〔従来の技術〕[Conventional technology]

リードフレームのタブリードおよび各リードの平滑な上
下面にリード方向に対して直角方向に断面V字形または
V字形の溝を1個所ないし数個所形成することが行なわ
れている(特開昭49−52976号公報)。これは打
抜き、フォトエツチング加工等によって形成されるリー
ドフレームにおいては半導体素子を塔載し封止材料にて
パッケージングした後の使用期間中に、外部の水分等が
主としてタブリードの上下面を伝わって浸入するのでタ
ブリードおよび各リードの平滑な上下面に1部または全
部にわたって溝を刻設してリード面に沿って水分が内部
に浸入するのを防止したものである。
One or more V-shaped or V-shaped grooves in cross section are formed in the tab lead of a lead frame and the smooth upper and lower surfaces of each lead in a direction perpendicular to the lead direction (Japanese Patent Laid-Open No. 49-52976). Publication No.). This is because in lead frames formed by punching, photo-etching, etc., external moisture mainly passes through the top and bottom surfaces of the tab leads during use after a semiconductor element is mounted and packaged with a sealing material. To prevent moisture from penetrating into the interior along the lead surface, grooves are cut on part or all of the smooth upper and lower surfaces of the tab lead and each lead to prevent moisture from penetrating into the interior along the lead surface.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

′ 半導体素子塔載後、セラミック、プラスチック、ガ
ラスなどの材料で、パッケージングするが、そのパッケ
ージング工程において、およびその後の使用中において
、機械的衝撃、熱的伸縮、電気的変形などにより、パッ
ケージング(封止)材料がリードフレームから剥がれる
ことがある。この剥離現象により、外部から、空気およ
び水分等が進入し、半導体素子の機能が阻害され、信頼
性が低下せしめられ、寿命が短縮せしめられてしまう。
´ After semiconductor devices are mounted, they are packaged using materials such as ceramics, plastics, and glass. However, during the packaging process and during subsequent use, the packaging may deteriorate due to mechanical shock, thermal expansion/contraction, electrical deformation, etc. The encapsulant material may peel off from the lead frame. Due to this peeling phenomenon, air, moisture, etc. enter from the outside, impeding the function of the semiconductor element, reducing reliability, and shortening the lifespan.

この封止材料の剥離現象は上記公報に記載されているよ
うにタブリードおよび各リードに1部または全部にわた
って溝を刻設し、リード面に沿っての水分等の浸入を防
止する処置を施こしても完全に防止することはできない
This peeling phenomenon of the sealing material can be solved by cutting a groove over part or all of the tab lead and each lead to prevent moisture from penetrating along the lead surface, as described in the above publication. However, it cannot be completely prevented.

そこで本発明が解決しようとする問題点は封止材料のリ
ードフレームからの剥離を防止したリードフレームを提
供することにある。
Therefore, the problem to be solved by the present invention is to provide a lead frame that prevents the sealing material from peeling off from the lead frame.

〔問題点を解決するための手段〕[Means for solving problems]

本発明者は上記問題点を解決すべく研究の結果、半導体
素子を塔載する面、或はその反対側の面に溝加工部を設
け、セラミック、プラスチ、り、ガラスなどの封止材料
がよくリードフレームに密着するように構成することに
より、封止材料のリードフレームからの剥離によって生
ずる半導体素子の機能低下を完全に解消しうることを見
いだし、かかる知見にもとづいて本発明を完成したもの
である。
As a result of research to solve the above problems, the inventor of the present invention has found that grooves are provided on the surface on which the semiconductor element is mounted, or on the opposite surface, and sealing materials such as ceramic, plastic, plastic, glass, etc. It has been discovered that by configuring the device so that it closely adheres to the lead frame, it is possible to completely eliminate the functional deterioration of the semiconductor element caused by the peeling of the sealing material from the lead frame, and based on this knowledge, the present invention has been completed. It is.

即ち1本発明は半導体装置用リードフレームにおいて、
半導体素子を塔載する面、或はその反対側の1部または
全面にわたって面に溝加工部を設け、セラミック、グラ
スチック、ガラスなどの封止材料がよくリードフレーム
に密着するように構成したものである。
That is, one aspect of the present invention is a lead frame for a semiconductor device, which includes:
A grooved part is provided on the surface on which the semiconductor element is mounted, or a part or the entire surface on the opposite side, so that the sealing material such as ceramic, glass, glass, etc. is in close contact with the lead frame. It is.

而して本発明において、溝加工部として、平面形状が直
線、丸、三角形、四角形、或は多角形が正規(格子状配
列)また千鳥配列された状態などの形状のものであって
、且つ溝の深さがリードフレームの機能を損うことがな
い範囲内のものであれば任意に選択することができる。
In the present invention, the grooved portion has a planar shape such as a straight line, circle, triangle, square, or polygon arranged in a regular (lattice-like arrangement) or staggered arrangement, and The depth of the groove can be arbitrarily selected as long as it is within a range that does not impair the function of the lead frame.

又、溝加工部は特に半導体素子搭載部(ベレ、ト付は部
)の裏側に施すのが有効である。
Further, it is particularly effective to form the grooved portion on the back side of the semiconductor element mounting portion (the portion with a bevel or a groove).

溝加工はリードフレームを製造加工するときに、プレス
加工、引掻き加工、ブラスト加工、写真食刻加工、レジ
ストパターンの印刷ト食刻による加工、或はめっき加工
により、同一工程で実施できる。
Groove processing can be carried out in the same process when manufacturing the lead frame by pressing, scratching, blasting, photo-etching, resist pattern printing and etching, or plating.

〔作 用〕[For production]

溝加工部は封止材料の密着を良好ならしめ、外部から空
気および水分等がリードフレームに沿って進入して半導
体素子の機能が低下せしめられるのを完全に防止する作
用をするものである。
The grooved portion improves the adhesion of the sealing material and completely prevents air, moisture, etc. from entering from the outside along the lead frame and deteriorating the functionality of the semiconductor element.

〔実施例〕〔Example〕

実施例1 第1図(al(blは本発明の半導体装置用リードフレ
ームの実施例を示し、第1図(alは平面図、第1図(
b)は背面図である。図において(りは溝加工部、(2
)は半導体素子塔載面の背面を示ギ2属素材として厚さ
0.250i11ffiの42鉄・ニッケル合金を用い
、両面に水溶性コロイド系フォトレジス)(G−90(
東京応化製))を塗布し、室温乾燥および90℃±2℃
の加熱処理(プリベ一対応する領域に溝加工用画像を有
するリードフレーム裏面用露光原版をあてがい、両原版
をフォ、トレジスト6布済みの金属素材である42鉄・
ニッケル合金板に真空密着させたのち、紫外線に富んだ
光(高圧水銀灯で照射)で露光し、温水にて現像後、1
80〜250’Cの加熱固化処理(ボストベーク)した
のち、43〜46°Be。
Example 1 FIG. 1 (al (bl) shows an example of the lead frame for a semiconductor device of the present invention, FIG. 1 (al is a plan view, FIG. 1 (
b) is a rear view. In the figure (ri is the grooved part, (2
) uses a 42 iron/nickel alloy with a thickness of 0.250x11ffi as an indicator material for the back side of the semiconductor element mounting surface, and a water-soluble colloidal photoresist (G-90 (
(manufactured by Tokyo Ohka)), dried at room temperature and 90℃±2℃
Heat treatment (Pribe-1) Apply an exposure master plate for the back side of the lead frame having a groove processing image to the corresponding area, and then apply both master plates to the photoresist.
After vacuum-adhering it to a nickel alloy plate, it was exposed to ultraviolet-rich light (irradiated with a high-pressure mercury lamp) and developed with warm water.
After heat solidification treatment (bost baking) at 80-250'C, 43-46°Be.

60〜65℃、 FeCl3液により両面エツチングし
、しかるのち、水洗し、次いで90〜96℃の熱アルカ
リ液(10〜20%NaOH液)をスプレィして残存レ
ジスト膜を溶解剥膜して第1図+al (blに示すよ
うなリードツレ−ムラ得り。
Both sides were etched with FeCl3 solution at 60-65°C, then washed with water, and then sprayed with hot alkaline solution (10-20% NaOH solution) at 90-96°C to dissolve and peel off the remaining resist film. Figure + al (Lead ray unevenness as shown in BL).

このリードフレームを用いて、半導体素子塔載面(ベレ
ット付は部)に半導体素子を塔載し、モールドした。
Using this lead frame, a semiconductor element was mounted on the semiconductor element mounting surface (the part with the bullet) and molded.

しかるのち、経時的に観察を行なった所、封止材料の剥
離は生じなかった。
Thereafter, when the sealing material was observed over time, no peeling of the sealing material occurred.

実施例2 実施例1と同様にして、但し、第2図示のようにリード
フレームの半導体素子塔載面の背面に格子状に溝加工部
(2)を形成した。
Example 2 In the same manner as in Example 1, however, as shown in the second figure, grooved portions (2) were formed in a lattice pattern on the back surface of the semiconductor element mounting surface of the lead frame.

実施例3 実施例2と同様にして、但し、第3図示のようにインナ
ーリード先端部の側面に溝(3)を形成した。
Example 3 In the same manner as in Example 2, however, a groove (3) was formed on the side surface of the tip of the inner lead as shown in the third figure.

実施例4 実施例1と同様にして、但し第4図示のようにリードフ
レームの半導体素子塔載面の背面に大きな円と小円4個
よりなる溝加工部を設けると共にインナーリード先端部
背面に小円状の溝部(4)を形成した。
Example 4 In the same manner as in Example 1, however, as shown in the fourth diagram, a grooved portion consisting of a large circle and four small circles was provided on the back surface of the semiconductor element mounting surface of the lead frame, and a grooved portion was formed on the back surface of the tip of the inner lead. A small circular groove (4) was formed.

実施例2ないし4についても実施例1と同様に封IE材
料の剥離は認められなかった。
Similarly to Example 1, no peeling of the sealing IE material was observed in Examples 2 to 4.

〔発明の効果〕〔Effect of the invention〕

本発明の半導体装置用リードフレームによればモールデ
ィング後の封止材料の剥離を完全に一防止することがで
きる。
According to the lead frame for a semiconductor device of the present invention, peeling of the sealing material after molding can be completely prevented.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(al(blは実施例1を示し、第1図(alは
平面図、@1図(blは背面図、第2図は実施例2の背
面図、第3図は実施例3の背面図、第4図は実施例4の
背面図である。 (1)・・・・・・・・・溝加工部 特許出願人 大日本印刷株式会社 代 理 人 弁理土手 西 淳 美 $ 1 図(a) 第1図(b) 第4図
Figure 1 (al (bl indicates Example 1); Figure 4 is a rear view of Embodiment 4. (1)...Groove processing department patent applicant Dai Nippon Printing Co., Ltd. Agent Atsushi Nishi $1 Figure (a) Figure 1 (b) Figure 4

Claims (1)

【特許請求の範囲】[Claims] 半導体装置用リードフレームにおいて、半導体素子を塔
載する面、或はその反対側の面に溝加工部を設けセラミ
ック、プラスチック、ガラスなどの封止材料がよくリー
ドフレームに密着するように構成したことを特徴とする
半導体装置用リードフレーム。
In a lead frame for a semiconductor device, a grooved portion is provided on the surface on which a semiconductor element is mounted, or on the opposite surface, so that a sealing material such as ceramic, plastic, glass, etc. is in close contact with the lead frame. A lead frame for semiconductor devices characterized by:
JP4307386A 1986-02-28 1986-02-28 Lead frame for semiconductor device Pending JPS62200751A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4307386A JPS62200751A (en) 1986-02-28 1986-02-28 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4307386A JPS62200751A (en) 1986-02-28 1986-02-28 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPS62200751A true JPS62200751A (en) 1987-09-04

Family

ID=12653673

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4307386A Pending JPS62200751A (en) 1986-02-28 1986-02-28 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPS62200751A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0345760A2 (en) * 1988-06-08 1989-12-13 STMicroelectronics S.r.l. Semiconductor device in plastic case with means of anchoring between chip-bearing slice and plastic body
JPH05226548A (en) * 1991-11-27 1993-09-03 Samsung Electron Co Ltd Lead frame for semiconductor device use
EP1335428A3 (en) * 1999-02-24 2003-10-08 Matsushita Electric Industrial Co., Ltd. Resin-moulded semiconductor device and method for manufacturing the same
JP2014093353A (en) * 2012-11-01 2014-05-19 Denso Corp Semiconductor device and semiconductor device manufacturing method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0345760A2 (en) * 1988-06-08 1989-12-13 STMicroelectronics S.r.l. Semiconductor device in plastic case with means of anchoring between chip-bearing slice and plastic body
EP0345760A3 (en) * 1988-06-08 1990-11-14 STMicroelectronics S.r.l. Semiconductor device in plastic case with means of anchoring between chip-bearing slice and plastic body
JPH05226548A (en) * 1991-11-27 1993-09-03 Samsung Electron Co Ltd Lead frame for semiconductor device use
EP1335428A3 (en) * 1999-02-24 2003-10-08 Matsushita Electric Industrial Co., Ltd. Resin-moulded semiconductor device and method for manufacturing the same
JP2014093353A (en) * 2012-11-01 2014-05-19 Denso Corp Semiconductor device and semiconductor device manufacturing method

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