JPS6219838U - - Google Patents
Info
- Publication number
- JPS6219838U JPS6219838U JP1985110414U JP11041485U JPS6219838U JP S6219838 U JPS6219838 U JP S6219838U JP 1985110414 U JP1985110414 U JP 1985110414U JP 11041485 U JP11041485 U JP 11041485U JP S6219838 U JPS6219838 U JP S6219838U
- Authority
- JP
- Japan
- Prior art keywords
- output
- frequency divider
- signal
- phase comparator
- switching circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001360 synchronised effect Effects 0.000 claims description 2
- 239000002131 composite material Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D1/00—Demodulation of amplitude-modulated oscillations
- H03D1/22—Homodyne or synchrodyne circuits
- H03D1/2209—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
- H03D1/2236—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders using a phase locked loop
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Circuits Of Receivers In General (AREA)
- Stereo-Broadcasting Methods (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985110414U JPH0416517Y2 (US20050065096A1-20050324-C00034.png) | 1985-07-18 | 1985-07-18 | |
| US06/886,720 US4691356A (en) | 1985-07-18 | 1986-07-18 | AM/FM synchronizing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985110414U JPH0416517Y2 (US20050065096A1-20050324-C00034.png) | 1985-07-18 | 1985-07-18 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6219838U true JPS6219838U (US20050065096A1-20050324-C00034.png) | 1987-02-05 |
| JPH0416517Y2 JPH0416517Y2 (US20050065096A1-20050324-C00034.png) | 1992-04-14 |
Family
ID=14535173
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985110414U Expired JPH0416517Y2 (US20050065096A1-20050324-C00034.png) | 1985-07-18 | 1985-07-18 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4691356A (US20050065096A1-20050324-C00034.png) |
| JP (1) | JPH0416517Y2 (US20050065096A1-20050324-C00034.png) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3885625T2 (de) * | 1987-01-20 | 1994-03-10 | Matsushita Electric Ind Co Ltd | Empfänger für Erd- und Satellitenrundfunk. |
| US5109542A (en) * | 1991-02-06 | 1992-04-28 | Motorola, Inc. | AM-FM combined stereo receiver |
| US20020157111A1 (en) * | 2001-04-20 | 2002-10-24 | Reams David Anthony | Television program-related coupon hyperlink system |
| DE10157331A1 (de) * | 2001-11-23 | 2003-05-28 | Thomson Brandt Gmbh | Gerät zur Aufzeichnung oder Wiedergabe von Informationen mit Mitteln zur Signalerzeugung aus einem Wobbelsignal |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57125530A (en) * | 1981-01-28 | 1982-08-04 | Nippon Gakki Seizo Kk | Removing circuit for interference of adjacent station at receiver |
-
1985
- 1985-07-18 JP JP1985110414U patent/JPH0416517Y2/ja not_active Expired
-
1986
- 1986-07-18 US US06/886,720 patent/US4691356A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US4691356A (en) | 1987-09-01 |
| JPH0416517Y2 (US20050065096A1-20050324-C00034.png) | 1992-04-14 |
