JPS62169550A - Data reception control system - Google Patents

Abstract

PURPOSE:To attain transmission of a transmitting text of variable length with us of a DMA control circuit by adding the fixed text length information to a fixing position of a data frame to be transmitted and also adding an end code to the end of the frame. CONSTITUTION:The text length information 2 shows the byte length of a subsequent text 3 and is set at the fixing position of a data frame. The text 3 has the transmission properties that can include an optional bit pattern and the variable length properties for optional length. A serial/parallel converter 7 converts the serial data received from a device at the remote side into a parallel form. This parallel data is transferred automatically to a memory 6 by a DMA control circuit 8. The number of bytes received actually is compared with the number of bytes received finally. If the former bytes are smaller than the latter ones, the receiving action is continued to wait for the report of detection of the next end code. Then the end of reception of a data frame is decided when the coincidence is secured between said two numbers of bytes. Thus it is possible to receive a transmitting text of optional length.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a data reception control method, and the present invention relates to a data reception control method, in which the text can have an arbitrary text length and include an arbitrary bit pattern, that is, variable length σ) transparent text. This invention relates to a data reception control method suitable for handling data.

[Background of the invention]

As a conventional data reception control method, (1) the data length of the frame to be transmitted is always fixed, as shown in Fig. 5;
There are two methods: (2) as shown in FIG. 6, an end code is defined in the variable length data section, and reception ends when the end code is detected.

However, (1) is not suitable for transmission where the text length changes arbitrarily because the data length of the transmitted frame is always fixed, and (2) does not allow the end code to be included in the transmitted text. Therefore, there is a drawback that a code identical to the end code may exist in the text, making it impossible to transmit the text over the number of marks.

Incidentally, a device related to this food is disclosed, for example, in Japanese Patent Application Laid-Open No. 59-201556.

[Purpose of the invention]

An object of the present invention is to solve the above-mentioned problems, to enable the transmission of variable-length transparent text to be completed with one frame transmission from the sender to the receiver 13, and to make it possible for the receiver 7 to process The aim is to reduce the burden on the processing circuitry required.

[Invention Q) Overview]

The present invention uses a data frame to be transmitted that includes fixed length text length information in σ fixed positions, and adds an end code to the end of the frame, and whenever the same code as the end code is detected. By comparing the text length information received earlier with the received data length, the received
This feature is characterized in that the continuation/end of the process is determined.

[Embodiments of the invention]

Hereinafter, one embodiment of the four inventions will be explained based on the reasons.

FIG. 2 is a diagram showing a received data frame.

1 is a header with a fixed length that is attached to the beginning of the data frame. Text length information 2 represents the 30-byte length of the following text, and the fixed position of the data frame! ! [Provided. The text 3 is the content of the information to be transmitted, and has a transparent character that may include any bit pattern and a variable length character that may have an arbitrary length. End code 4 is information indicating the end of the data frame.

Figure g3 is a diagram showing the configuration of a receiver according to the present invention.

The memory 6 is used to store control programs and various application programs.

It can also be used as a receive buffer. The arithmetic control circuit 5 is, for example, a micro 10 setter, which performs the °C operation according to the program in the memo 'J6F'H.

When the other device (not shown) transmits serial data to the serial/parallel conversion circuit 7 in accordance with the 21st (1) data format, this serial data is converted into parallel data. Converted parallel data (Direct Memory Access: Di
\4A) Stored in the reception buffer in the memory 6 by the control circuit 8. The specific code extraction cycle vJ9 reports a detection signal to the arithmetic control circuit 5 when the same code as the end code is transferred to the reception buffer in the memory 6.

FIG. 1 is a flowchart for explaining the reception operation based on the present invention. The arithmetic control circuit 5 performs this reception operation control (gl'f) according to the reception control program stored in the memory 6.
Ru. First, before starting reception, communication mode settings such as parity pit length and stop bit length are performed for the serial/parallel conversion circuit 7 (step 10). Next, i) MA control circuit 8 sets the transfer destination start address to memory 6 internal reception 1.
8 buffer head address is set, and the value of the receive buffer capacity is set in the received byte counter 81 (step 11). Next, an end code (in this embodiment, a carriage return code is used) is stored in the specific code register 91 in the specific code detection circuit 9.

(abbreviated as CR) (step 12).

When the above initial settings are completed, the arithmetic control circuit 5 starts the reception operation for the W column parallel '& conversion circuit 7 (
Step 13).

After starting reception, serial data 1 sent from the other device
¥: The serial/parallel converter circuit 7 converts it into parallel data and converts it to DMA.
Control circuit 8 automatically transfers to memory 6. During the transfer of the reception 1 data, the arithmetic control circuit 5 keeps the end code detection report waiting state (step 14) unless it receives an end code detection alarm from the timed code horizontal output circuit 9 (step 14). In addition, the DMA system # circuit 8 counters the received byte counter 81 every time the received data is transferred byte by byte.
Reduce by 11. Therefore, the number of received bytes can be expressed as [receive buffer capacity - content of popular byte counter 81] (bytes). Arithmetic control circuit 5 is finished (code)
When the detection is reported, the above-mentioned calculation is performed (step 17).
By this, the cutting tool ff that has been cut up to that point is known. Further, the number of bytes of the text 3 to be finally received is determined by referring to the previously received text length information 2 from the memory 6. Furthermore, the number of bytes actually received is compared with the number of bytes that should be finally received, and the number of bytes received is finally received! If the number of bytes to be r is less than the number of bytes to be
Continue N, wait for the next exit code detection report, and when the number of bytes received reaches the number of bytes finally received,
Ending the annotation of one data frame (step 18)
.

The above data injury control method can be of any length (variable length)
a) It is possible to receive transparent text. Figure $4 shows a diagram to show this.

If the text contains a CR that is the same code as the end code, the end code detection is reported to the ear unit 5 on the calculation side, but at this time, the number of received bytes is finally received. Since the number of bytes is less than the expected number of bytes, 5 reception continues. When the end code is received, the number of damaged bytes has reached the final byte a to be damaged, so the damage ends.

In this way, by making the end/continuation judgment of reception only when the end code is detected, the arithmetic control circuit 5 can avoid the negative effect of the arithmetic control circuit 5, and the arithmetic control circuit 5 can program the applicator 1. [Invention σ] Effect] According to the present invention, there is provided a wound device that enables the transmission of transparent text of variable length using a DM/control circuit. realizable. Therefore, data transfer processing is performed in a hardware manner, which prevents overruns and enables high communication speeds.
During GOOBPS, data 0) to 1 interval; approximately 1 m 8
However, it is inevitable that the data payment processing will be completed within this time, but the program input output (Progr.
In the am, input, zero output (PIO) method, the program processing speed method will not be able to keep up with the VC, and there is a high risk of overrun occurring. However, in the present invention, which uses a DMA control circuit, data transfer is performed by hardware, so there is no restriction on the program processing speed, and it is easy to increase the communication speed. Also,
The arithmetic control circuit is released from data reception processing, and the time required for reception processing is approximately 1 of the σ of the 1'MO method.
/ Shortened to 100.

[Brief explanation of drawings]

i@1 is a flowchart for explaining the receiving operation based on the present invention, FIG. 2 is a diagram showing a data frame based on the present invention, and FIG. 3 is a diagram showing the configuration of the receiving device based on the present invention. The figure is a diagram for explaining the biasing operation Y according to the present invention, and Figures 5 and 6 are diagrams for explaining the prior art. 1... Header 2... Text length information 3.
...Test 1,000 strikes 4...End code 5...Arithmetic system #Lgl supply 6...Memory 7...Series parallel conversion! Circuit 8...1) MA stop circuit 9...Timed code detection circuit 100...Data bus/patent attorney Ogawa ``1st Ward''
4 concave opening 2nd concave (f

Claims (1)

[Claims] In a data reception control method that includes an arithmetic control section, a memory, a DMA control section, and a specific code detection section, and receives data under the control of a reception control program in the memory, a fixed length text is placed at a fixed position in a data frame. information,
Further, the data format is such that an end code is added to the end of each end code, and the arithmetic control section is configured to combine the received text length information with the DMA control section only when the specific code detection section detects the same code as the end code. A data reception control method characterized by determining whether to continue or terminate data frame reception based on the number of received data set in .