JPS62166645U - - Google Patents

Info

Publication number
JPS62166645U
JPS62166645U JP1986053806U JP5380686U JPS62166645U JP S62166645 U JPS62166645 U JP S62166645U JP 1986053806 U JP1986053806 U JP 1986053806U JP 5380686 U JP5380686 U JP 5380686U JP S62166645 U JPS62166645 U JP S62166645U
Authority
JP
Japan
Prior art keywords
islands
lead frame
semiconductor device
utility
parallel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986053806U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986053806U priority Critical patent/JPS62166645U/ja
Publication of JPS62166645U publication Critical patent/JPS62166645U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の平面図、第2図は
従来のペレツト1個搭載用リードフレームの構成
単位の平面図、第3図は従来のペレツト2個搭載
用リードフレームの構成単位の平面図である。 1,2,3……アイランド。
Fig. 1 is a plan view of an embodiment of the present invention, Fig. 2 is a plan view of a structural unit of a conventional lead frame for mounting one pellet, and Fig. 3 is a plan view of a structural unit of a conventional lead frame for mounting two pellets. FIG. 1, 2, 3... Island.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 平行に配置された3個のアイランドと該アイラ
ンドより外部引出し用端子が伸ばされた半導体装
置用リードフレームにおいて、3個のアイランド
面積が同一であることを特徴とする半導体装置用
リードフレーム。
A lead frame for a semiconductor device including three islands arranged in parallel and an external lead terminal extending from the islands, wherein the three islands have the same area.
JP1986053806U 1986-04-09 1986-04-09 Pending JPS62166645U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986053806U JPS62166645U (en) 1986-04-09 1986-04-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986053806U JPS62166645U (en) 1986-04-09 1986-04-09

Publications (1)

Publication Number Publication Date
JPS62166645U true JPS62166645U (en) 1987-10-22

Family

ID=30880207

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986053806U Pending JPS62166645U (en) 1986-04-09 1986-04-09

Country Status (1)

Country Link
JP (1) JPS62166645U (en)

Similar Documents

Publication Publication Date Title
JPS62166645U (en)
JPS62122359U (en)
JPS63102250U (en)
JPH0252456U (en)
JPS64340U (en)
JPS61203564U (en)
JPS61106038U (en)
JPH0291356U (en)
JPS61119357U (en)
JPS64331U (en)
JPH0186246U (en)
JPS62140741U (en)
JPH0474463U (en)
JPH0325252U (en)
JPS6452249U (en)
JPS6214749U (en)
JPH028053U (en)
JPS6420746U (en)
JPS6355556U (en)
JPS61183534U (en)
JPH0252455U (en)
JPH0284329U (en)
JPS63131144U (en)
JPH0275747U (en)
JPH01104029U (en)