JPS62165977A - Compound semiconductor device - Google Patents
Compound semiconductor deviceInfo
- Publication number
- JPS62165977A JPS62165977A JP834786A JP834786A JPS62165977A JP S62165977 A JPS62165977 A JP S62165977A JP 834786 A JP834786 A JP 834786A JP 834786 A JP834786 A JP 834786A JP S62165977 A JPS62165977 A JP S62165977A
- Authority
- JP
- Japan
- Prior art keywords
- region
- gate electrode
- schottky
- schottky junction
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- 150000001875 compounds Chemical class 0.000 title claims abstract description 10
- 239000012535 impurity Substances 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 239000000463 material Substances 0.000 claims abstract description 7
- 238000009792 diffusion process Methods 0.000 claims description 27
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 13
- 230000006866 deterioration Effects 0.000 abstract description 3
- 230000009977 dual effect Effects 0.000 abstract 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- -1 Silicon ions Chemical class 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- PTFCDOFLOPIGGS-UHFFFAOYSA-N Zinc dication Chemical compound [Zn+2] PTFCDOFLOPIGGS-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
Description
【発明の詳細な説明】
くイ）産業上の利用分野
本発明は、化合物半導体装置の耐サージ性を高めるため
に、化合物半導体装置と一緒に形成する保護ダイオード
に関するものである。DETAILED DESCRIPTION OF THE INVENTION B) Industrial Application Field The present invention relates to a protection diode formed together with a compound semiconductor device in order to improve the surge resistance of the compound semiconductor device.
く口）従来の技術
化合物半導体装置、例えばガリウムーヒ素電界効果トラ
ンジスタ（以下ＧａＡｓＭＥＳＦＥＴという。）は、低
雑音、高利得など優れた特性をもつマイクロ波帯増幅素
子として実用化が盛んにすすめられている。しかしなが
ら、ＧａＡｓＭＥＳＦＥＴはゲートがショットキ接合の
ためゲート・ソース間、ゲート・ドレイン間にサージエ
ネルギが加わった場合に、ショットキ接合が破壊されや
すい。従って最近ではＧａＡｓを用いてＧａＡｓＭＥＳ
ＦＥＴと保護ダイオードをモノリシック集積化するなど
の対策がなされている（例えば信学技報５ＳＤ８２−１
３２．７５頁乃至７９頁が詳しい。）。(Explanation) Conventional technology Compound semiconductor devices, such as gallium-arsenide field effect transistors (hereinafter referred to as GaAs MESFETs), are being actively put into practical use as microwave band amplification elements with excellent characteristics such as low noise and high gain. . However, since the gate of a GaAs MESFET is a Schottky junction, the Schottky junction is easily destroyed when surge energy is applied between the gate and source or between the gate and drain. Therefore, recently, GaAsMES has been developed using GaAs.
Countermeasures such as monolithic integration of FETs and protection diodes have been taken (for example, IEICE Technical Report 5SD82-1).
32. Pages 75 to 79 are detailed. ).
ところで前述した保護ダイオードとしては一般に第３図
に示す如く、ＧａＡｓ基板〈３２）にイオン注入等で形
成されたＮ型の拡散領域（３３）と、前記Ｎ型の拡散領
域（３３）の一部と接合するように形成されたＰ＋型の
拡散領域（３４）とにより構成され、ＧａＡｓＭＥＳＦ
ＥＴのゲート・ソース間に接続きれた形でモノリシック
集積化されていた。By the way, as shown in FIG. 3, the aforementioned protection diode generally includes an N-type diffusion region (33) formed by ion implantation into a GaAs substrate (32), and a part of the N-type diffusion region (33). and a P+ type diffusion region (34) formed to be in contact with the GaAs MESF.
It was monolithically integrated with a connection between the gate and source of the ET.
（ハ）発明が解決しようとする問題点
斯上の如き構成の保護ダイオード（３１）に於て、充分
なサージ耐圧を得るために、前記保護ダイ才−ド（３１
）の降伏電圧をＦＥＴのゲートショットキの降伏電圧よ
りも低くする必要がある。そのために例えばＰＮ接合の
保護ダイオード（３１〉等を接続している。しかしこの
保護ダイオード（３１）はスイッチングスピードが遅い
ため、サージが加わった瞬間に電流は保護ダイオード（
３１）の方に流れず、流れやすいショットキ接合のゲー
トに流れてしまう。(c) Problems to be Solved by the Invention In order to obtain a sufficient surge withstand voltage in the protective diode (31) having the above configuration, it is necessary to
) must be lower than the gate Schottky breakdown voltage of the FET. For this purpose, for example, a PN junction protection diode (31) is connected. However, this protection diode (31) has a slow switching speed, so the moment a surge is applied, the current flows through the protection diode (31).
31) and instead flows to the gate of the Schottky junction where it flows easily.
従ってサージが加わった瞬間においてゲートのショット
キ接合部にかなりの負担がかかつてしまう問題点を有し
ていた。Therefore, there is a problem in that a considerable load is placed on the Schottky joint of the gate at the moment a surge is applied.
一部Ｐ”Ｎ接合のうちＰｌの拡散領域（３４）の底面の
一部とＮ型の拡散領域（３３）で形成されている部分の
面積が大きいために寄生容量が増加し雑音指数（ＮＦ）
を大幅に劣化させる原因となっていた。Because the area of the part of the partial P''N junction formed by a part of the bottom of the Pl diffusion region (34) and the N type diffusion region (33) is large, the parasitic capacitance increases and the noise figure (NF )
This was the cause of significant deterioration.
（ニ）問題点を解決するための手段
本発明は上述した問題点に鑑みてなされ、化合物半導体
基板（２）上にショットキ接合よりなるゲート電極（２
３）（２４）を有するトランジスタ（２１）と、前記ト
ランジスタ（２１）のゲート電極（２３）（２４）と同
一材料で形成されたショットキ接合よりなる保護ダイオ
ード（１）とを具備し、前記ショットキ接合する第１の
拡散領域（３）表面に前記第１の拡散領域り３）と同導
電型で前記第１の拡散領域（３〉より薄い不純物濃度の
第２の拡散領域（５）を有することで解決するものであ
る。(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems.
3) a protection diode (1) made of a Schottky junction formed of the same material as the gate electrodes (23) and (24) of the transistor (21); A second diffusion region (5) having the same conductivity type as the first diffusion region (3) and a lower impurity concentration than the first diffusion region (3) is provided on the surface of the first diffusion region (3) to be bonded. This will solve the problem.
（ホ）作用
ＧａＡｓＭＥＳＦＥＴのゲート電極と同一材料で形成さ
れた保護ダイオード（１）の電極（４）はショットキ接
合されているため、サージ吸収をゲート電極のショット
キ接合部と保護ダイオード（１）のショットキ接合部と
でほぼ半分ずつ吸収することができる。従ってサージが
加わった瞬間においてゲート電極のショットキ接合部の
負担を軽減できる。(e) Function Since the electrode (4) of the protection diode (1) formed of the same material as the gate electrode of the GaAs MESFET has a Schottky junction, surge absorption is achieved between the Schottky junction of the gate electrode and the Schottky junction of the protection diode (1). It is possible to absorb approximately half the amount at the joint. Therefore, the load on the Schottky junction of the gate electrode can be reduced at the moment a surge is applied.
また前記ショットキ接合する第１の拡散領域り３）にお
いて表面の不純物濃度の薄い領域を設けることによりそ
の領域は動作時における空乏層領域と対応し、不純物濃
度が低いために容量は小さくなる。Further, by providing a region with a low impurity concentration on the surface in the first diffusion region 3) forming the Schottky junction, the region corresponds to a depletion layer region during operation, and the capacitance becomes small because the impurity concentration is low.
一部ブレーク・ダウン時において、空乏層領域は不純物
濃度のピーク領域あるいは近傍まで到達し、全体として
は不純物濃度が高くなるため耐圧を下げることができる
。At the time of partial breakdown, the depletion layer region reaches the impurity concentration peak region or near it, and the impurity concentration increases as a whole, so that the withstand voltage can be lowered.
（へ）実施例 以下に本発明の実施例を図面を参照しながら説明する。(f) Example Embodiments of the present invention will be described below with reference to the drawings.
第１図は本発明による保護ダイオード（１）の一実施例
であり、第２図に示した如＜ＧａＡＳデュアルゲートＭ
ＥＳＦＥＴのゲート１（Ｇｌ）に接続された保護ダイオ
ード（２２）の断面図を示すものである。FIG. 1 shows an embodiment of the protection diode (1) according to the present invention, and as shown in FIG.
1 shows a cross-sectional view of a protection diode (22) connected to gate 1 (Gl) of the ESFET.
第１図に示す如く、少なくとも化合物半導体基板（２）
例えば半絶縁性ＧａＡｓ基板に形成される一導電型（Ｎ
型）の第１の拡散領域（３）がある。As shown in FIG. 1, at least a compound semiconductor substrate (2)
For example, one conductivity type (N
There is a first diffusion region (3) of type 1).
ここではＧａＡｓ基板（２）上に例えばＣＶＤ法等を用
いてシリコン酸化膜を約５０００人被覆し、Ｎ型の第１
の拡散領域（３）に対応するシリコン酸化膜を開口し、
シリコンイオン（Ｓｉ”）をドーズ量５×ＩＱ１ＳＣＩ
ＴＩ−’、加速電圧３６０ＫｅＶの条件でイオン注入し
、Ｎ型の第１の拡散領域（３）を形成する。Here, approximately 5,000 silicon oxide films are coated on the GaAs substrate (2) using, for example, the CVD method, and an N-type first
Opening the silicon oxide film corresponding to the diffusion region (3) of
Silicon ions (Si”) at a dose of 5×IQ1SCI
Ion implantation is performed under the conditions of TI-' and an acceleration voltage of 360 KeV to form an N-type first diffusion region (3).
この後、前記Ｎ型の第１の拡散領域（３）の対応する領
域に亜鉛イオン（Ｚｎ”）を２Ｘ１０”ａｍ−”、３６
０ＫｅＶの条件でイオンを注入し、前記Ｎ型の第１の拡
散領域（３）の表面領域のシリコンイオン（Ｓ ｉ”）
濃度をうすめる。これは第１図の（５）の領域に相当す
る。従って前記ショットキ接合するＮ型の第１の拡散領
域（３）において表面近くの濃度を大幅に薄めることが
できる。After this, zinc ions (Zn") are added to the corresponding region of the N-type first diffusion region (3) at 2×10"am-", 36
Ions are implanted under the condition of 0 KeV to form silicon ions (S i'') in the surface region of the N-type first diffusion region (3).
Dilute the concentration. This corresponds to area (5) in FIG. Therefore, the concentration near the surface of the Schottky junction N-type first diffusion region (3) can be significantly reduced.
次に前記−導電型の第１の拡散領域（３）の両端にショ
ットキ接合される電極（４）（４）がある。Next, there are electrodes (4) (4) connected to Schottky junctions at both ends of the first diffusion region (3) of the - conductivity type.
従って前記Ｎ型の第１の拡散領域（３）とこのＮ型の第
１の拡散領域（３〉の両端に形成されるショットキ接合
部（４＞（４）とで第２図におけるゲート１（Ｇ１）に
接続された２つのショットキ・バリア・ダイオードが形
成され、ゲート電極の保護ダイオード（２２）として構
成される。Therefore, the N-type first diffusion region (3) and the Schottky junction (4>(4) formed at both ends of the N-type first diffusion region (3) Two Schottky barrier diodes connected to G1) are formed and configured as gate electrode protection diodes (22).
本発明の第１の特徴とするところは、Ｇ ａＡ ｓＭＥ
ＳＦＥＴのゲート電極と同一材料で形成されたショット
キ接合よりなる保護ダイオードにある。The first feature of the present invention is that GaA sME
This is a protection diode made of a Schottky junction made of the same material as the gate electrode of the SFET.
つまりここでは前記ＧａＡｓ基板（２）上にシリコン酸
化膜を被覆し直し、前記ショットキ接合部に対応する領
域のシリコン酸化膜を除去し、開口部にチタン、白金お
よび金等の中の−っまたはそのいくつかを組合せて蒸看
しショットキ接合部を形成する。That is, here, the silicon oxide film is recoated on the GaAs substrate (2), the silicon oxide film in the area corresponding to the Schottky junction is removed, and the opening is filled with titanium, platinum, gold, etc. Some of them are combined to form a steamed Schottky joint.
従ってＧａＡｓＭ Ｅ Ｓ Ｆ Ｅ Ｔのゲート電極と
同一材料で形成された保護ダイオード（２２）もショッ
トキ接合されているため、サージが加わった瞬間の電流
をＧａＡｓＭ Ｅ Ｓ Ｆ Ｅ Ｔのゲート電極（２３
）と保護ダイオード（２２）の電極とでほぼ半分ずつ吸
収することができる。そのためゲート電極に加わるサー
ジエネルギの負担が半減される。Therefore, since the protective diode (22) formed of the same material as the gate electrode of the GaAsM E S F E T is also connected to a Schottky junction, the current at the moment when a surge is applied is transferred to the gate electrode (23) of the GaAs M E S F E T.
) and the electrode of the protection diode (22) can absorb approximately half of the energy. Therefore, the burden of surge energy applied to the gate electrode is halved.
また保護ダイオード（１）に生ずるシリーズ抵抗は電極
（４）、（４）間の距離で決定され、またその領域は同
じＮ型だけであるためシリーズ抵抗を非常に小さくでき
る。従ってサージエネルギの吸収が良い。Further, the series resistance occurring in the protection diode (1) is determined by the distance between the electrodes (4), (4), and since the area is only of the same N type, the series resistance can be made very small. Therefore, surge energy is well absorbed.
本発明の第２の特徴とするところは前記ショットキ接合
するＮ型の第１の拡散領域（３）において表面近くの不
純物濃度を大幅に下げることにある。つまり表面の不純
物濃度の薄い領域（５）は動作時における空乏居領域と
対応し、不純物濃度が低いため容量は小さくなる。A second feature of the present invention is that the impurity concentration near the surface of the N-type first diffusion region (3) forming the Schottky junction is significantly reduced. In other words, the region (5) with a low impurity concentration on the surface corresponds to a depletion region during operation, and since the impurity concentration is low, the capacitance is small.
またブレーク・ダウン時において、空乏層領域は不純物
濃度のピーク領域あるいは近傍まで到達し、全体として
は不純物濃度が高くなるため耐圧を下げることができる
。Further, at the time of breakdown, the depletion layer region reaches the impurity concentration peak region or the vicinity thereof, and the impurity concentration increases as a whole, so that the withstand voltage can be lowered.
（ト）発明の効果
本発明は以上の説明からも明らかな如く、ＧａＡｓＭＥ
ＳＦＥＴのゲート電極と同一材料で形成された保護ダイ
オード（１）の電極もショットキ接合されているため、
ゲート電極と保護ダイオード（１）の電極とでほぼ半分
ずつサージ吸収できるのでゲート電極のショットキ接合
部の負担を軽減できる。(g) Effects of the invention As is clear from the above description, the present invention
Since the electrode of the protection diode (1), which is made of the same material as the gate electrode of the SFET, is also connected to a Schottky junction,
Since the gate electrode and the electrode of the protection diode (1) can absorb approximately half the surge, the load on the Schottky junction of the gate electrode can be reduced.
保護ダイオード（１）に生ずるシリーズ抵抗が／ＪＳさ
いため、サージエネルギの吸収が良い。従来の保護ダイ
オードにくらべＰ型拡散が無い分構造的に非常に簡単で
あるため製造工程数が少なくてすむ。Since the series resistance generated in the protection diode (1) is small, surge energy is well absorbed. Compared to conventional protection diodes, since there is no P-type diffusion, the structure is very simple and requires fewer manufacturing steps.
また動作時においては容量を減らせるので雑音指数（Ｎ
Ｆ）の劣化を少なくすることができ、更にはブレーク・
ダウン時において全体として不純物濃度を高く形成でき
るので、通常印加するゲートバイアスに近い値まで耐圧
を下げることができる。Also, during operation, the capacity can be reduced, so the noise figure (N
F) can reduce deterioration, and furthermore, break
Since the overall impurity concentration can be made high during down time, the breakdown voltage can be lowered to a value close to the normally applied gate bias.
第１図は本発明の一実施例である化合物半導体装置の保
護ダイオードの断面図、第２図はデュアルゲートＭＥＳ
ＦＥＴに保護ダイオードを設けた時の接続図、第３図は
従来の保護ダイオードの断面図である。
（１）は保護ダイオード、（２）はＧａＡｓ基板、＜３
）はＮ型の第１の拡散領域、（４）は電極、（５）は第
２の拡散領域である。
出願人 三洋電機株式会社 外１名
代理人 弁理士 佐 野 静 夫
第１図
、１．’ｌ； ２図Fig. 1 is a cross-sectional view of a protection diode of a compound semiconductor device which is an embodiment of the present invention, and Fig. 2 is a cross-sectional view of a protection diode of a compound semiconductor device according to an embodiment of the present invention.
A connection diagram when a protection diode is provided in the FET, and FIG. 3 is a sectional view of a conventional protection diode. (1) is a protection diode, (2) is a GaAs substrate, <3
) is an N-type first diffusion region, (4) is an electrode, and (5) is a second diffusion region. Applicant Sanyo Electric Co., Ltd. and one other agent Patent attorney Shizuo Sano Figure 1, 1. 'l; Figure 2
Claims (1)
ート電極を有するトランジスタと、前記トランジスタの
ゲート電極と同一材料で形成されたショットキ接合より
なる保護ダイオードとを具備し、前記ショットキ接合す
る第１の拡散領域表面に前記第１の拡散領域と同導電型
で前記第１の拡散領域より薄い不純物濃度の第２の拡散
領域を有することを特徴とした化合物半導体装置。(1) A transistor having a gate electrode made of a Schottky junction on a compound semiconductor substrate, and a protection diode made of a Schottky junction formed of the same material as the gate electrode of the transistor, and a first diffusion connected to the Schottky junction. 1. A compound semiconductor device comprising, on a surface of the region, a second diffusion region having the same conductivity type as the first diffusion region and having a lower impurity concentration than the first diffusion region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP834786A JPS62165977A (en) | 1986-01-17 | 1986-01-17 | Compound semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP834786A JPS62165977A (en) | 1986-01-17 | 1986-01-17 | Compound semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62165977A true JPS62165977A (en) | 1987-07-22 |
Family
ID=11690685
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP834786A Pending JPS62165977A (en) | 1986-01-17 | 1986-01-17 | Compound semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62165977A (en) |
-
1986
- 1986-01-17 JP JP834786A patent/JPS62165977A/en active Pending
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